25#ifndef __CMSIS_ARMCC_H
26#define __CMSIS_ARMCC_H
29#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
30 #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
34#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
35 (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
36 #define __ARM_ARCH_6M__ 1
39#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
40 #define __ARM_ARCH_7M__ 1
43#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
44 #define __ARM_ARCH_7EM__ 1
56 #define __INLINE __inline
58#ifndef __STATIC_INLINE
59 #define __STATIC_INLINE static __inline
61#ifndef __STATIC_FORCEINLINE
62 #define __STATIC_FORCEINLINE static __forceinline
65 #define __NO_RETURN __declspec(noreturn)
68 #define __USED __attribute__((used))
71 #define __WEAK __attribute__((weak))
74 #define __PACKED __attribute__((packed))
76#ifndef __PACKED_STRUCT
77 #define __PACKED_STRUCT __packed struct
80 #define __PACKED_UNION __packed union
82#ifndef __UNALIGNED_UINT32
83 #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
85#ifndef __UNALIGNED_UINT16_WRITE
86 #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
88#ifndef __UNALIGNED_UINT16_READ
89 #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
91#ifndef __UNALIGNED_UINT32_WRITE
92 #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
94#ifndef __UNALIGNED_UINT32_READ
95 #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
98 #define __ALIGNED(x) __attribute__((aligned(x)))
101 #define __RESTRICT __restrict
132 register uint32_t __regControl
__ASM(
"control");
133 return(__regControl);
144 register uint32_t __regControl
__ASM(
"control");
145 __regControl = control;
156 register uint32_t __regIPSR
__ASM(
"ipsr");
168 register uint32_t __regAPSR
__ASM(
"apsr");
180 register uint32_t __regXPSR
__ASM(
"xpsr");
192 register uint32_t __regProcessStackPointer
__ASM(
"psp");
193 return(__regProcessStackPointer);
204 register uint32_t __regProcessStackPointer
__ASM(
"psp");
205 __regProcessStackPointer = topOfProcStack;
216 register uint32_t __regMainStackPointer
__ASM(
"msp");
217 return(__regMainStackPointer);
228 register uint32_t __regMainStackPointer
__ASM(
"msp");
229 __regMainStackPointer = topOfMainStack;
240 register uint32_t __regPriMask
__ASM(
"primask");
241 return(__regPriMask);
252 register uint32_t __regPriMask
__ASM(
"primask");
253 __regPriMask = (priMask);
257#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
258 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
265#define __enable_fault_irq __enable_fiq
273#define __disable_fault_irq __disable_fiq
283 register uint32_t __regBasePri
__ASM(
"basepri");
284 return(__regBasePri);
295 register uint32_t __regBasePri
__ASM(
"basepri");
296 __regBasePri = (basePri & 0xFFU);
308 register uint32_t __regBasePriMax
__ASM(
"basepri_max");
309 __regBasePriMax = (basePri & 0xFFU);
320 register uint32_t __regFaultMask
__ASM(
"faultmask");
321 return(__regFaultMask);
332 register uint32_t __regFaultMask
__ASM(
"faultmask");
333 __regFaultMask = (faultMask & (uint32_t)1U);
347#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
348 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
349 register uint32_t __regfpscr
__ASM(
"fpscr");
364#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
365 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
366 register uint32_t __regfpscr
__ASM(
"fpscr");
367 __regfpscr = (fpscr);
419 __schedule_barrier();\
421 __schedule_barrier();\
430 __schedule_barrier();\
432 __schedule_barrier();\
441 __schedule_barrier();\
443 __schedule_barrier();\
462#ifndef __NO_EMBEDDED_ASM
477#ifndef __NO_EMBEDDED_ASM
503#define __BKPT(value) __breakpoint(value)
512#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
513 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
514 #define __RBIT __rbit
519 uint32_t s = (4U * 8U) - 1U;
522 for (value >>= 1U; value != 0U; value >>= 1U)
525 result |= value & 1U;
543#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
544 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
552#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
553 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
555 #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
565#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
566 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
568 #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
578#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
579 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
581 #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
593#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
594 #define __STREXB(value, ptr) __strex(value, ptr)
596 #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
608#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
609 #define __STREXH(value, ptr) __strex(value, ptr)
611 #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
623#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
624 #define __STREXW(value, ptr) __strex(value, ptr)
626 #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
634#define __CLREX __clrex
664#ifndef __NO_EMBEDDED_ASM
679#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
688#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
697#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
706#define __STRBT(value, ptr) __strt(value, ptr)
715#define __STRHT(value, ptr) __strt(value, ptr)
724#define __STRT(value, ptr) __strt(value, ptr)
738 if ((
sat >= 1U) && (
sat <= 32U))
740 const int32_t max = (int32_t)((1U << (
sat - 1U)) - 1U);
741 const int32_t min = -1 - max ;
765 const uint32_t max = ((1U <<
sat) - 1U);
766 if (val > (int32_t)max)
775 return (uint32_t)val;
790#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
792#define __SADD8 __sadd8
793#define __QADD8 __qadd8
794#define __SHADD8 __shadd8
795#define __UADD8 __uadd8
796#define __UQADD8 __uqadd8
797#define __UHADD8 __uhadd8
798#define __SSUB8 __ssub8
799#define __QSUB8 __qsub8
800#define __SHSUB8 __shsub8
801#define __USUB8 __usub8
802#define __UQSUB8 __uqsub8
803#define __UHSUB8 __uhsub8
804#define __SADD16 __sadd16
805#define __QADD16 __qadd16
806#define __SHADD16 __shadd16
807#define __UADD16 __uadd16
808#define __UQADD16 __uqadd16
809#define __UHADD16 __uhadd16
810#define __SSUB16 __ssub16
811#define __QSUB16 __qsub16
812#define __SHSUB16 __shsub16
813#define __USUB16 __usub16
814#define __UQSUB16 __uqsub16
815#define __UHSUB16 __uhsub16
818#define __SHASX __shasx
820#define __UQASX __uqasx
821#define __UHASX __uhasx
824#define __SHSAX __shsax
826#define __UQSAX __uqsax
827#define __UHSAX __uhsax
828#define __USAD8 __usad8
829#define __USADA8 __usada8
830#define __SSAT16 __ssat16
831#define __USAT16 __usat16
832#define __UXTB16 __uxtb16
833#define __UXTAB16 __uxtab16
834#define __SXTB16 __sxtb16
835#define __SXTAB16 __sxtab16
836#define __SMUAD __smuad
837#define __SMUADX __smuadx
838#define __SMLAD __smlad
839#define __SMLADX __smladx
840#define __SMLALD __smlald
841#define __SMLALDX __smlaldx
842#define __SMUSD __smusd
843#define __SMUSDX __smusdx
844#define __SMLSD __smlsd
845#define __SMLSDX __smlsdx
846#define __SMLSLD __smlsld
847#define __SMLSLDX __smlsldx
852#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
853 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
855#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
856 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
858#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
859 ((int64_t)(ARG3) << 32U) ) >> 32U))
#define __ASM
Definition: cmsis_armcc.h:53
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
Signed Saturate.
Definition: cmsis_armclang.h:1121
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
Unsigned Saturate.
Definition: cmsis_armclang.h:1146
uint32_t sat
Definition: cmsis_armcc.h:737
#define __RBIT
Reverse bit order of value.
Definition: cmsis_armclang.h:903
#define __REV16(value)
Reverse byte order (16 bit)
Definition: cmsis_armclang.h:857
#define __REVSH(value)
Reverse byte order (16 bit)
Definition: cmsis_armclang.h:866
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
Reverse byte order (16 bit)
Definition: cmsis_armcc.h:463
__STATIC_INLINE void __set_CONTROL(uint32_t control)
Set Control Register.
Definition: cmsis_armcc.h:142
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Set Main Stack Pointer.
Definition: cmsis_armcc.h:226
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Set Process Stack Pointer.
Definition: cmsis_armcc.h:202
#define __set_FPSCR(x)
Set FPSCR.
Definition: cmsis_armclang.h:766
__STATIC_INLINE uint32_t __get_PRIMASK(void)
Get Priority Mask.
Definition: cmsis_armcc.h:238
__STATIC_INLINE uint32_t __get_MSP(void)
Get Main Stack Pointer.
Definition: cmsis_armcc.h:214
__STATIC_INLINE uint32_t __get_FPSCR(void)
Get FPSCR.
Definition: cmsis_armcc.h:345
__STATIC_INLINE uint32_t __get_CONTROL(void)
Enable IRQ Interrupts.
Definition: cmsis_armcc.h:130
__STATIC_INLINE uint32_t __get_PSP(void)
Get Process Stack Pointer.
Definition: cmsis_armcc.h:190
__STATIC_INLINE uint32_t __get_xPSR(void)
Get xPSR Register.
Definition: cmsis_armcc.h:178
__STATIC_INLINE uint32_t __get_APSR(void)
Get APSR Register.
Definition: cmsis_armcc.h:166
__STATIC_INLINE uint32_t __get_IPSR(void)
Get IPSR Register.
Definition: cmsis_armcc.h:154
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Set Priority Mask.
Definition: cmsis_armcc.h:250