25#if defined ( __ICCARM__ )
26 #pragma system_include
27#elif defined (__clang__)
28 #pragma clang system_header
31#ifndef ARM_MPU_ARMV8_H
32#define ARM_MPU_ARMV8_H
35#define ARM_MPU_ATTR_DEVICE ( 0U )
38#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
46#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
47 (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
50#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
53#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
56#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
59#define ARM_MPU_ATTR_DEVICE_GRE (3U)
65#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
68#define ARM_MPU_SH_NON (0U)
71#define ARM_MPU_SH_OUTER (2U)
74#define ARM_MPU_SH_INNER (3U)
80#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
89#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
90 ((BASE & MPU_RBAR_BASE_Msk) | \
91 ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
92 ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
93 ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
99#define ARM_MPU_RLAR(LIMIT, IDX) \
100 ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
101 ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
119 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
120#ifdef SCB_SHCSR_MEMFAULTENA_Msk
131#ifdef SCB_SHCSR_MEMFAULTENA_Msk
132 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
134 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
145 MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
146#ifdef SCB_SHCSR_MEMFAULTENA_Msk
157#ifdef SCB_SHCSR_MEMFAULTENA_Msk
158 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
160 MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
171 const uint8_t reg = idx / 4U;
172 const uint32_t pos = ((idx % 4U) * 8U);
173 const uint32_t mask = 0xFFU << pos;
175 if (reg >= (
sizeof(mpu->MAIR) /
sizeof(mpu->MAIR[0]))) {
179 mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
259__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
273 for (i = 0U; i < len; ++i)
292 uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
293 uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
296 while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
297 uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
298 orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->
RBAR), c*rowWordSize);
302 rnrBase += MPU_TYPE_RALIASES;
306 orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->
RBAR), cnt*rowWordSize);
#define __RESTRICT
Definition: cmsis_armcc.h:101
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
#define __DSB()
Data Synchronization Barrier.
Definition: cmsis_armcc.h:429
#define __ISB()
Instruction Synchronization Barrier.
Definition: cmsis_armcc.h:418
#define SCB_SHCSR_MEMFAULTENA_Msk
Definition: core_armv8mml.h:694
#define SCB
Definition: core_armv8mbl.h:1122
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type *mpu, uint32_t rnr)
Clear and disable the given MPU region of the given MPU.
Definition: mpu_armv8.h:206
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type *mpu, uint8_t idx, uint8_t attr)
Set the memory attribute encoding to the given MPU.
Definition: mpu_armv8.h:169
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
Configure the given MPU region of the given MPU.
Definition: mpu_armv8.h:236
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
Enable the MPU.
Definition: mpu_armv8.h:115
__STATIC_INLINE void ARM_MPU_Disable(void)
Disable the MPU.
Definition: mpu_armv8.h:127
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
Configure the given MPU region.
Definition: mpu_armv8.h:248
__STATIC_INLINE void orderedCpy(volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len)
Memcopy with strictly ordered memory access, e.g.
Definition: mpu_armv8.h:270
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
Clear and disable the given MPU region.
Definition: mpu_armv8.h:215
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
Set the memory attribute encoding.
Definition: mpu_armv8.h:186
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type *mpu, uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt)
Load the given number of MPU regions from a table to the given MPU.
Definition: mpu_armv8.h:285
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt)
Load the given number of MPU regions from a table.
Definition: mpu_armv8.h:315
Struct for a single MPU Region.
Definition: mpu_armv7.h:180
uint32_t RLAR
Definition: mpu_armv8.h:109
uint32_t RBAR
The region base address register value (RBAR)
Definition: mpu_armv7.h:181