19#ifndef __STM32F3xx_HAL_FLASH_EX_H
20#define __STM32F3xx_HAL_FLASH_EX_H
41#define FLASH_SIZE_DATA_REGISTER (0x1FFFF7CCU)
50#define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \
51 ((VALUE) == FLASH_TYPEERASE_MASSERASE))
53#define IS_OPTIONBYTE(VALUE) ((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))
55#define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || \
56 ((VALUE) == OB_WRPSTATE_ENABLE))
58#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1))
60#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
61 ((LEVEL) == OB_RDP_LEVEL_1))
64#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
66#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
68#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
70#define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET))
72#define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF))
74#define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_SRAM_PARITY_SET) || ((PARITY) == OB_SRAM_PARITY_RESET))
77#if defined(FLASH_OBR_SDADC12_VDD_MONITOR)
78#define IS_OB_SDACD_VDD_MONITOR(VDD_MONITOR) (((VDD_MONITOR) == OB_SDACD_VDD_MONITOR_SET) || \
79 ((VDD_MONITOR) == OB_SDACD_VDD_MONITOR_RESET))
82#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U))
84#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
85 || defined(STM32F373xC) || defined(STM32F378xx)
86#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? \
87 ((ADDRESS) <= 0x0803FFFFU) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \
88 ((ADDRESS) <= 0x0801FFFFU) : ((ADDRESS) <= 0x0800FFFFU))))
92#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
93#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= 0x0807FFFFU))
96#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) \
97 || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
98#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? \
99 ((ADDRESS) <= 0x0800FFFFU) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \
100 ((ADDRESS) <= 0x08007FFFU) : ((ADDRESS) <= 0x08003FFFU))))
104#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
105 || defined(STM32F373xC) || defined(STM32F378xx)
106#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0803FFFFU) : \
107 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0801FFFFU) : \
108 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0800FFFFU)))
112#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
113#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0807FFFFU)
116#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) \
117 || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
118#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0800FFFFU) : \
119 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x08007FFFU) : \
120 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x08003FFFU)))
140 uint32_t PageAddress;
178 uint32_t DATAAddress;
196#define FLASH_PAGE_SIZE 0x800
204#define FLASH_TYPEERASE_PAGES (0x00U)
205#define FLASH_TYPEERASE_MASSERASE (0x01U)
218#define OPTIONBYTE_WRP (0x01U)
219#define OPTIONBYTE_RDP (0x02U)
220#define OPTIONBYTE_USER (0x04U)
221#define OPTIONBYTE_DATA (0x08U)
230#define OB_WRPSTATE_DISABLE (0x00U)
231#define OB_WRPSTATE_ENABLE (0x01U)
240#define OB_WRP_PAGES0TO1 (0x00000001U)
241#define OB_WRP_PAGES2TO3 (0x00000002U)
242#define OB_WRP_PAGES4TO5 (0x00000004U)
243#define OB_WRP_PAGES6TO7 (0x00000008U)
244#define OB_WRP_PAGES8TO9 (0x00000010U)
245#define OB_WRP_PAGES10TO11 (0x00000020U)
246#define OB_WRP_PAGES12TO13 (0x00000040U)
247#define OB_WRP_PAGES14TO15 (0x00000080U)
248#define OB_WRP_PAGES16TO17 (0x00000100U)
249#define OB_WRP_PAGES18TO19 (0x00000200U)
250#define OB_WRP_PAGES20TO21 (0x00000400U)
251#define OB_WRP_PAGES22TO23 (0x00000800U)
252#define OB_WRP_PAGES24TO25 (0x00001000U)
253#define OB_WRP_PAGES26TO27 (0x00002000U)
254#define OB_WRP_PAGES28TO29 (0x00004000U)
255#define OB_WRP_PAGES30TO31 (0x00008000U)
257#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
258 || defined(STM32F373xC) || defined(STM32F378xx)
259#define OB_WRP_PAGES32TO33 (0x00010000U)
260#define OB_WRP_PAGES34TO35 (0x00020000U)
261#define OB_WRP_PAGES36TO37 (0x00040000U)
262#define OB_WRP_PAGES38TO39 (0x00080000U)
263#define OB_WRP_PAGES40TO41 (0x00100000U)
264#define OB_WRP_PAGES42TO43 (0x00200000U)
265#define OB_WRP_PAGES44TO45 (0x00400000U)
266#define OB_WRP_PAGES46TO47 (0x00800000U)
267#define OB_WRP_PAGES48TO49 (0x01000000U)
268#define OB_WRP_PAGES50TO51 (0x02000000U)
269#define OB_WRP_PAGES52TO53 (0x04000000U)
270#define OB_WRP_PAGES54TO55 (0x08000000U)
271#define OB_WRP_PAGES56TO57 (0x10000000U)
272#define OB_WRP_PAGES58TO59 (0x20000000U)
273#define OB_WRP_PAGES60TO61 (0x40000000U)
274#define OB_WRP_PAGES62TO127 (0x80000000U)
278#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
279#define OB_WRP_PAGES32TO33 (0x00010000U)
280#define OB_WRP_PAGES34TO35 (0x00020000U)
281#define OB_WRP_PAGES36TO37 (0x00040000U)
282#define OB_WRP_PAGES38TO39 (0x00080000U)
283#define OB_WRP_PAGES40TO41 (0x00100000U)
284#define OB_WRP_PAGES42TO43 (0x00200000U)
285#define OB_WRP_PAGES44TO45 (0x00400000U)
286#define OB_WRP_PAGES46TO47 (0x00800000U)
287#define OB_WRP_PAGES48TO49 (0x01000000U)
288#define OB_WRP_PAGES50TO51 (0x02000000U)
289#define OB_WRP_PAGES52TO53 (0x04000000U)
290#define OB_WRP_PAGES54TO55 (0x08000000U)
291#define OB_WRP_PAGES56TO57 (0x10000000U)
292#define OB_WRP_PAGES58TO59 (0x20000000U)
293#define OB_WRP_PAGES60TO61 (0x40000000U)
294#define OB_WRP_PAGES62TO255 (0x80000000U)
297#define OB_WRP_PAGES0TO15MASK (0x000000FFU)
298#define OB_WRP_PAGES16TO31MASK (0x0000FF00U)
300#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
301 || defined(STM32F373xC) || defined(STM32F378xx)
302#define OB_WRP_PAGES32TO47MASK (0x00FF0000U)
303#define OB_WRP_PAGES48TO127MASK (0xFF000000U)
307#if defined(STM32F302xE) || defined(STM32F303xE)
308#define OB_WRP_PAGES32TO47MASK (0x00FF0000U)
309#define OB_WRP_PAGES48TO255MASK (0xFF000000U)
312#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) \
313 || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
314 || defined(STM32F373xC) || defined(STM32F378xx)
315#define OB_WRP_ALLPAGES (0xFFFFFFFFU)
320#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) \
321 || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
322#define OB_WRP_ALLPAGES (0x0000FFFFU)
333#define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
334#define OB_RDP_LEVEL_1 ((uint8_t)0xBBU)
335#define OB_RDP_LEVEL_2 ((uint8_t)0xCCU)
344#define OB_IWDG_SW ((uint8_t)0x01U)
345#define OB_IWDG_HW ((uint8_t)0x00U)
353#define OB_STOP_NO_RST ((uint8_t)0x02U)
354#define OB_STOP_RST ((uint8_t)0x00U)
362#define OB_STDBY_NO_RST ((uint8_t)0x04U)
363#define OB_STDBY_RST ((uint8_t)0x00U)
371#define OB_BOOT1_RESET ((uint8_t)0x00U)
372#define OB_BOOT1_SET ((uint8_t)0x10U)
380#define OB_VDDA_ANALOG_ON ((uint8_t)0x20U)
381#define OB_VDDA_ANALOG_OFF ((uint8_t)0x00U)
389#define OB_SRAM_PARITY_SET ((uint8_t)0x00U)
390#define OB_SRAM_PARITY_RESET ((uint8_t)0x40U)
396#if defined(FLASH_OBR_SDADC12_VDD_MONITOR)
400#define OB_SDACD_VDD_MONITOR_RESET ((uint8_t)0x00U)
401#define OB_SDACD_VDD_MONITOR_SET ((uint8_t)0x80U)
411#define OB_DATA_ADDRESS_DATA0 (0x1FFFF804U)
412#define OB_DATA_ADDRESS_DATA1 (0x1FFFF806U)
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress)
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
HAL_StatusTypeDef HAL_FLASHEx_OBErase(void)
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f3xx_hal_def.h:39
FLASH Erase structure definition.
Definition: stm32f3xx_hal_flash_ex.h:135
FLASH Options bytes program structure definition.
Definition: stm32f3xx_hal_flash_ex.h:151