20#ifndef STM32F3xx_HAL_I2C_H
21#define STM32F3xx_HAL_I2C_H
165#define HAL_I2C_ERROR_NONE (0x00000000U)
166#define HAL_I2C_ERROR_BERR (0x00000001U)
167#define HAL_I2C_ERROR_ARLO (0x00000002U)
168#define HAL_I2C_ERROR_AF (0x00000004U)
169#define HAL_I2C_ERROR_OVR (0x00000008U)
170#define HAL_I2C_ERROR_DMA (0x00000010U)
171#define HAL_I2C_ERROR_TIMEOUT (0x00000020U)
172#define HAL_I2C_ERROR_SIZE (0x00000040U)
173#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U)
174#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
175#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U)
177#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U)
225#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
245 void (* AddrCallback)(
struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
256#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
262 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
263 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
264 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
265 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
266 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
267 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
268 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
269 HAL_I2C_ERROR_CB_ID = 0x07U,
270 HAL_I2C_ABORT_CB_ID = 0x08U,
272 HAL_I2C_MSPINIT_CB_ID = 0x09U,
273 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
275} HAL_I2C_CallbackIDTypeDef;
282typedef void (*pI2C_AddrCallbackTypeDef)(
I2C_HandleTypeDef *hi2c, uint8_t TransferDirection,
283 uint16_t AddrMatchCode);
303#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
304#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
305#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
306#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
307#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
308#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
313#define I2C_OTHER_FRAME (0x000000AAU)
314#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
322#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
323#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
331#define I2C_DUALADDRESS_DISABLE (0x00000000U)
332#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
340#define I2C_OA2_NOMASK ((uint8_t)0x00U)
341#define I2C_OA2_MASK01 ((uint8_t)0x01U)
342#define I2C_OA2_MASK02 ((uint8_t)0x02U)
343#define I2C_OA2_MASK03 ((uint8_t)0x03U)
344#define I2C_OA2_MASK04 ((uint8_t)0x04U)
345#define I2C_OA2_MASK05 ((uint8_t)0x05U)
346#define I2C_OA2_MASK06 ((uint8_t)0x06U)
347#define I2C_OA2_MASK07 ((uint8_t)0x07U)
355#define I2C_GENERALCALL_DISABLE (0x00000000U)
356#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
364#define I2C_NOSTRETCH_DISABLE (0x00000000U)
365#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
373#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
374#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
382#define I2C_DIRECTION_TRANSMIT (0x00000000U)
383#define I2C_DIRECTION_RECEIVE (0x00000001U)
391#define I2C_RELOAD_MODE I2C_CR2_RELOAD
392#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
393#define I2C_SOFTEND_MODE (0x00000000U)
401#define I2C_NO_STARTSTOP (0x00000000U)
402#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
403#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
404#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
415#define I2C_IT_ERRI I2C_CR1_ERRIE
416#define I2C_IT_TCI I2C_CR1_TCIE
417#define I2C_IT_STOPI I2C_CR1_STOPIE
418#define I2C_IT_NACKI I2C_CR1_NACKIE
419#define I2C_IT_ADDRI I2C_CR1_ADDRIE
420#define I2C_IT_RXI I2C_CR1_RXIE
421#define I2C_IT_TXI I2C_CR1_TXIE
429#define I2C_FLAG_TXE I2C_ISR_TXE
430#define I2C_FLAG_TXIS I2C_ISR_TXIS
431#define I2C_FLAG_RXNE I2C_ISR_RXNE
432#define I2C_FLAG_ADDR I2C_ISR_ADDR
433#define I2C_FLAG_AF I2C_ISR_NACKF
434#define I2C_FLAG_STOPF I2C_ISR_STOPF
435#define I2C_FLAG_TC I2C_ISR_TC
436#define I2C_FLAG_TCR I2C_ISR_TCR
437#define I2C_FLAG_BERR I2C_ISR_BERR
438#define I2C_FLAG_ARLO I2C_ISR_ARLO
439#define I2C_FLAG_OVR I2C_ISR_OVR
440#define I2C_FLAG_PECERR I2C_ISR_PECERR
441#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
442#define I2C_FLAG_ALERT I2C_ISR_ALERT
443#define I2C_FLAG_BUSY I2C_ISR_BUSY
444#define I2C_FLAG_DIR I2C_ISR_DIR
463#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
464#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
465 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
466 (__HANDLE__)->MspInitCallback = NULL; \
467 (__HANDLE__)->MspDeInitCallback = NULL; \
470#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
487#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
503#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
519#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \
520 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
545#define I2C_FLAG_MASK (0x0001FFFFU)
546#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
547 (__FLAG__)) == (__FLAG__)) ? SET : RESET)
566#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \
567 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
568 ((__HANDLE__)->Instance->ICR = (__FLAG__)))
574#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
580#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
586#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
609#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
611 pI2C_CallbackTypeDef pCallback);
627 uint16_t Size, uint32_t Timeout);
629 uint16_t Size, uint32_t Timeout);
635 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
637 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
649 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
651 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
673 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
675 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
739#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
740 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
742#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
743 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
745#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
746 ((MASK) == I2C_OA2_MASK01) || \
747 ((MASK) == I2C_OA2_MASK02) || \
748 ((MASK) == I2C_OA2_MASK03) || \
749 ((MASK) == I2C_OA2_MASK04) || \
750 ((MASK) == I2C_OA2_MASK05) || \
751 ((MASK) == I2C_OA2_MASK06) || \
752 ((MASK) == I2C_OA2_MASK07))
754#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
755 ((CALL) == I2C_GENERALCALL_ENABLE))
757#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
758 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
760#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
761 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
763#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
764 ((MODE) == I2C_AUTOEND_MODE) || \
765 ((MODE) == I2C_SOFTEND_MODE))
767#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
768 ((REQUEST) == I2C_GENERATE_START_READ) || \
769 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
770 ((REQUEST) == I2C_NO_STARTSTOP))
772#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
773 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
774 ((REQUEST) == I2C_NEXT_FRAME) || \
775 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
776 ((REQUEST) == I2C_LAST_FRAME) || \
777 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
778 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
780#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
781 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
783#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
784 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \
785 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \
788#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \
790#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \
792#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
793#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
794#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
796#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
797#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
799#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
800 (uint16_t)(0xFF00U))) >> 8U)))
801#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
803#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \
804 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
805 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
806 (~I2C_CR2_RD_WRN)) : \
807 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
808 (I2C_CR2_ADD10) | (I2C_CR2_START) | \
809 (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)))
811#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
812 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
813#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
#define __IO
Definition: core_armv8mbl.h:196
HAL_I2C_ModeTypeDef
Definition: stm32f3xx_hal_i2c.h:149
@ HAL_I2C_MODE_MASTER
Definition: stm32f3xx_hal_i2c.h:151
@ HAL_I2C_MODE_MEM
Definition: stm32f3xx_hal_i2c.h:153
@ HAL_I2C_MODE_SLAVE
Definition: stm32f3xx_hal_i2c.h:152
@ HAL_I2C_MODE_NONE
Definition: stm32f3xx_hal_i2c.h:150
HAL_I2C_StateTypeDef
Definition: stm32f3xx_hal_i2c.h:109
@ HAL_I2C_STATE_BUSY
Definition: stm32f3xx_hal_i2c.h:112
@ HAL_I2C_STATE_LISTEN
Definition: stm32f3xx_hal_i2c.h:115
@ HAL_I2C_STATE_BUSY_TX_LISTEN
Definition: stm32f3xx_hal_i2c.h:116
@ HAL_I2C_STATE_ABORT
Definition: stm32f3xx_hal_i2c.h:120
@ HAL_I2C_STATE_TIMEOUT
Definition: stm32f3xx_hal_i2c.h:121
@ HAL_I2C_STATE_BUSY_RX
Definition: stm32f3xx_hal_i2c.h:114
@ HAL_I2C_STATE_BUSY_RX_LISTEN
Definition: stm32f3xx_hal_i2c.h:118
@ HAL_I2C_STATE_RESET
Definition: stm32f3xx_hal_i2c.h:110
@ HAL_I2C_STATE_BUSY_TX
Definition: stm32f3xx_hal_i2c.h:113
@ HAL_I2C_STATE_READY
Definition: stm32f3xx_hal_i2c.h:111
@ HAL_I2C_STATE_ERROR
Definition: stm32f3xx_hal_i2c.h:122
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c)
uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c)
HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c)
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
struct __I2C_HandleTypeDef I2C_HandleTypeDef
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f3xx_hal_def.h:39
HAL_LockTypeDef
HAL Lock structures definition
Definition: stm32f3xx_hal_def.h:50
Header file of I2C HAL Extended module.
Definition: stm32f3xx_hal_i2c.h:48
uint32_t GeneralCallMode
Definition: stm32f3xx_hal_i2c.h:69
uint32_t NoStretchMode
Definition: stm32f3xx_hal_i2c.h:72
uint32_t OwnAddress2Masks
Definition: stm32f3xx_hal_i2c.h:65
uint32_t AddressingMode
Definition: stm32f3xx_hal_i2c.h:56
uint32_t OwnAddress2
Definition: stm32f3xx_hal_i2c.h:62
uint32_t Timing
Definition: stm32f3xx_hal_i2c.h:49
uint32_t OwnAddress1
Definition: stm32f3xx_hal_i2c.h:53
uint32_t DualAddressMode
Definition: stm32f3xx_hal_i2c.h:59
Inter-integrated Circuit Interface.
Definition: stm32f303xe.h:528
DMA handle Structure definition
Definition: stm32f3xx_hal_dma.h:110
Definition: stm32f3xx_hal_i2c.h:187
__IO uint32_t PreviousState
Definition: stm32f3xx_hal_i2c.h:201
I2C_TypeDef * Instance
Definition: stm32f3xx_hal_i2c.h:188
uint16_t XferSize
Definition: stm32f3xx_hal_i2c.h:194
HAL_StatusTypeDef(* XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
Definition: stm32f3xx_hal_i2c.h:203
__IO uint16_t XferCount
Definition: stm32f3xx_hal_i2c.h:196
__IO HAL_I2C_StateTypeDef State
Definition: stm32f3xx_hal_i2c.h:213
__IO uint32_t Memaddress
Definition: stm32f3xx_hal_i2c.h:223
DMA_HandleTypeDef * hdmarx
Definition: stm32f3xx_hal_i2c.h:208
__IO uint32_t XferOptions
Definition: stm32f3xx_hal_i2c.h:198
__IO uint32_t Devaddress
Definition: stm32f3xx_hal_i2c.h:221
__IO uint32_t ErrorCode
Definition: stm32f3xx_hal_i2c.h:217
I2C_InitTypeDef Init
Definition: stm32f3xx_hal_i2c.h:190
HAL_LockTypeDef Lock
Definition: stm32f3xx_hal_i2c.h:211
__IO HAL_I2C_ModeTypeDef Mode
Definition: stm32f3xx_hal_i2c.h:215
__IO uint32_t AddrEventCount
Definition: stm32f3xx_hal_i2c.h:219
DMA_HandleTypeDef * hdmatx
Definition: stm32f3xx_hal_i2c.h:206
uint8_t * pBuffPtr
Definition: stm32f3xx_hal_i2c.h:192