My Project
|
Macros | |
#define | IS_ADC_ALL_INSTANCE(INSTANCE) |
#define | IS_ADC_MULTIMODE_MASTER_INSTANCE(INSTANCE) |
#define | IS_ADC_COMMON_INSTANCE(INSTANCE) |
#define | IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN) |
#define | IS_COMP_ALL_INSTANCE(INSTANCE) |
#define | IS_COMP_COMMON_INSTANCE(COMMON_INSTANCE) |
#define | IS_COMP_WINDOWMODE_INSTANCE(INSTANCE) |
#define | IS_CRC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CRC) |
#define | IS_DAC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == DAC1) |
#define | IS_DAC_CHANNEL_INSTANCE(INSTANCE, CHANNEL) |
#define | IS_DMA_ALL_INSTANCE(INSTANCE) |
#define | IS_GPIO_ALL_INSTANCE(INSTANCE) |
#define | IS_GPIO_AF_INSTANCE(INSTANCE) |
#define | IS_GPIO_LOCK_INSTANCE(INSTANCE) |
#define | IS_I2C_ALL_INSTANCE(INSTANCE) |
#define | IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE) |
#define | IS_I2S_ALL_INSTANCE(INSTANCE) |
#define | IS_I2S_EXT_ALL_INSTANCE(INSTANCE) |
#define | IS_OPAMP_ALL_INSTANCE(INSTANCE) |
#define | IS_IWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == IWDG) |
#define | IS_RTC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == RTC) |
#define | IS_SMBUS_ALL_INSTANCE(INSTANCE) |
#define | IS_SPI_ALL_INSTANCE(INSTANCE) |
#define | IS_TIM_INSTANCE(INSTANCE) |
#define | IS_TIM_CC1_INSTANCE(INSTANCE) |
#define | IS_TIM_CC2_INSTANCE(INSTANCE) |
#define | IS_TIM_CC3_INSTANCE(INSTANCE) |
#define | IS_TIM_CC4_INSTANCE(INSTANCE) |
#define | IS_TIM_CC5_INSTANCE(INSTANCE) |
#define | IS_TIM_CC6_INSTANCE(INSTANCE) |
#define | IS_TIM_ADVANCED_INSTANCE(INSTANCE) |
#define | IS_TIM_CLOCK_SELECT_INSTANCE(INSTANCE) |
#define | IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE) |
#define | IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE) |
#define | IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE) |
#define | IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE) |
#define | IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE) |
#define | IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) |
#define | IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE) |
#define | IS_TIM_ETR_INSTANCE(INSTANCE) |
#define | IS_TIM_XOR_INSTANCE(INSTANCE) |
#define | IS_TIM_MASTER_INSTANCE(INSTANCE) |
#define | IS_TIM_SLAVE_INSTANCE(INSTANCE) |
#define | IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) ((INSTANCE) == TIM2) |
#define | IS_TIM_DMABURST_INSTANCE(INSTANCE) |
#define | IS_TIM_BREAK_INSTANCE(INSTANCE) |
#define | IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) |
#define | IS_TIM_CCXN_INSTANCE(INSTANCE, CHANNEL) |
#define | IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE) |
#define | IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE) |
#define | IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE) |
#define | IS_TIM_BKIN2_INSTANCE(INSTANCE) |
#define | IS_TIM_TRGO2_INSTANCE(INSTANCE) |
#define | IS_TIM_DMA_INSTANCE(INSTANCE) |
#define | IS_TIM_DMA_CC_INSTANCE(INSTANCE) |
#define | IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE) |
#define | IS_TIM_REMAP_INSTANCE(INSTANCE) |
#define | IS_TIM_COMBINED3PHASEPWM_INSTANCE(INSTANCE) |
#define | IS_TSC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == TSC) |
#define | IS_USART_INSTANCE(INSTANCE) |
#define | IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(INSTANCE) |
#define | IS_UART_INSTANCE(INSTANCE) |
#define | IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) |
#define | IS_UART_LIN_INSTANCE(INSTANCE) |
#define | IS_UART_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) |
#define | IS_UART_HWFLOW_INSTANCE(INSTANCE) |
#define | IS_UART_AUTOBAUDRATE_DETECTION_INSTANCE(INSTANCE) |
#define | IS_UART_DRIVER_ENABLE_INSTANCE(INSTANCE) |
#define | IS_SMARTCARD_INSTANCE(INSTANCE) |
#define | IS_IRDA_INSTANCE(INSTANCE) |
#define | IS_UART_DMA_INSTANCE(INSTANCE) (1) |
#define | IS_PCD_ALL_INSTANCE(INSTANCE) ((INSTANCE) == USB) |
#define | IS_WWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == WWDG) |
#define | SET_BIT(REG, BIT) ((REG) |= (BIT)) |
#define | CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) |
#define | READ_BIT(REG, BIT) ((REG) & (BIT)) |
#define | CLEAR_REG(REG) ((REG) = (0x0)) |
#define | WRITE_REG(REG, VAL) ((REG) = (VAL)) |
#define | READ_REG(REG) ((REG)) |
#define | MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) |
#define | POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) |
#define | ATOMIC_SET_BIT(REG, BIT) |
#define | ATOMIC_CLEAR_BIT(REG, BIT) |
#define | ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) |
#define | ATOMIC_SETH_BIT(REG, BIT) |
#define | ATOMIC_CLEARH_BIT(REG, BIT) |
#define | ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) |
#define ATOMIC_CLEAR_BIT | ( | REG, | |
BIT | |||
) |
#define ATOMIC_CLEARH_BIT | ( | REG, | |
BIT | |||
) |
#define ATOMIC_MODIFY_REG | ( | REG, | |
CLEARMSK, | |||
SETMASK | |||
) |
#define ATOMIC_MODIFYH_REG | ( | REG, | |
CLEARMSK, | |||
SETMASK | |||
) |
#define ATOMIC_SET_BIT | ( | REG, | |
BIT | |||
) |
#define ATOMIC_SETH_BIT | ( | REG, | |
BIT | |||
) |
#define CLEAR_BIT | ( | REG, | |
BIT | |||
) | ((REG) &= ~(BIT)) |
#define CLEAR_REG | ( | REG | ) | ((REG) = (0x0)) |
#define IS_ADC_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_ADC_COMMON_INSTANCE | ( | INSTANCE | ) |
#define IS_ADC_MULTIMODE_MASTER_INSTANCE | ( | INSTANCE | ) |
#define IS_CAN_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == CAN) |
#define IS_COMP_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_COMP_COMMON_INSTANCE | ( | COMMON_INSTANCE | ) |
#define IS_COMP_WINDOWMODE_INSTANCE | ( | INSTANCE | ) |
#define IS_CRC_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == CRC) |
#define IS_DAC_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == DAC1) |
#define IS_DAC_CHANNEL_INSTANCE | ( | INSTANCE, | |
CHANNEL | |||
) |
#define IS_DMA_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_GPIO_AF_INSTANCE | ( | INSTANCE | ) |
#define IS_GPIO_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_GPIO_LOCK_INSTANCE | ( | INSTANCE | ) |
#define IS_I2C_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE | ( | INSTANCE | ) | IS_I2C_ALL_INSTANCE(INSTANCE) |
#define IS_I2S_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_I2S_EXT_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_IRDA_INSTANCE | ( | INSTANCE | ) |
#define IS_IWDG_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == IWDG) |
#define IS_OPAMP_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_PCD_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == USB) |
#define IS_RTC_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == RTC) |
#define IS_SMARTCARD_INSTANCE | ( | INSTANCE | ) |
#define IS_SMBUS_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_SPI_ALL_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_32B_COUNTER_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == TIM2) |
#define IS_TIM_ADVANCED_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_BKIN2_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_BREAK_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CC1_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CC2_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CC3_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CC4_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CC5_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CC6_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CCX_INSTANCE | ( | INSTANCE, | |
CHANNEL | |||
) |
#define IS_TIM_CCXN_INSTANCE | ( | INSTANCE, | |
CHANNEL | |||
) |
#define IS_TIM_CLOCK_DIVISION_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CLOCK_SELECT_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_COMBINED3PHASEPWM_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_COMMUTATION_EVENT_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_DMA_CC_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_DMA_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_DMABURST_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_ENCODER_INTERFACE_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_ETR_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_MASTER_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_OCXREF_CLEAR_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_REMAP_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_REPETITION_COUNTER_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_SLAVE_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_TRGO2_INSTANCE | ( | INSTANCE | ) |
#define IS_TIM_XOR_INSTANCE | ( | INSTANCE | ) |
#define IS_TSC_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == TSC) |
#define IS_UART_AUTOBAUDRATE_DETECTION_INSTANCE | ( | INSTANCE | ) |
#define IS_UART_DMA_INSTANCE | ( | INSTANCE | ) | (1) |
#define IS_UART_DRIVER_ENABLE_INSTANCE | ( | INSTANCE | ) |
#define IS_UART_HALFDUPLEX_INSTANCE | ( | INSTANCE | ) |
#define IS_UART_HWFLOW_INSTANCE | ( | INSTANCE | ) |
#define IS_UART_INSTANCE | ( | INSTANCE | ) |
#define IS_UART_LIN_INSTANCE | ( | INSTANCE | ) |
#define IS_UART_WAKEUP_FROMSTOP_INSTANCE | ( | INSTANCE | ) |
#define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE | ( | INSTANCE | ) |
#define IS_USART_INSTANCE | ( | INSTANCE | ) |
#define IS_WWDG_ALL_INSTANCE | ( | INSTANCE | ) | ((INSTANCE) == WWDG) |
#define MODIFY_REG | ( | REG, | |
CLEARMASK, | |||
SETMASK | |||
) | WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) |
#define READ_BIT | ( | REG, | |
BIT | |||
) | ((REG) & (BIT)) |
#define READ_REG | ( | REG | ) | ((REG)) |
#define SET_BIT | ( | REG, | |
BIT | |||
) | ((REG) |= (BIT)) |
#define WRITE_REG | ( | REG, | |
VAL | |||
) | ((REG) = (VAL)) |