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Get the enable or disable status of the APB1 peripheral clock. More...
Get the enable or disable status of the APB1 peripheral clock.
#define __HAL_RCC_DAC1_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_DAC1EN)) == RESET) |
#define __HAL_RCC_DAC1_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_DAC1EN)) != RESET) |
#define __HAL_RCC_I2C1_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET) |
#define __HAL_RCC_I2C1_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET) |
#define __HAL_RCC_PWR_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET) |
#define __HAL_RCC_PWR_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET) |
#define __HAL_RCC_TIM2_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET) |
#define __HAL_RCC_TIM2_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET) |
#define __HAL_RCC_TIM6_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET) |
#define __HAL_RCC_TIM6_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET) |
#define __HAL_RCC_USART2_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET) |
#define __HAL_RCC_USART2_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET) |
#define __HAL_RCC_USART3_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET) |
#define __HAL_RCC_USART3_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET) |
#define __HAL_RCC_WWDG_IS_CLK_DISABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET) |
#define __HAL_RCC_WWDG_IS_CLK_ENABLED | ( | ) | ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET) |