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Macros

#define __HAL_RCC_LSE_CONFIG(__STATE__)
 Macro to configure the External Low Speed oscillator (LSE).
 

Detailed Description


Macro Definition Documentation

◆ __HAL_RCC_LSE_CONFIG

#define __HAL_RCC_LSE_CONFIG (   __STATE__)
Value:
do{ \
if ((__STATE__) == RCC_LSE_ON) \
{ \
SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
} \
else if ((__STATE__) == RCC_LSE_OFF) \
{ \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
} \
else if ((__STATE__) == RCC_LSE_BYPASS) \
{ \
SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
} \
else \
{ \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
} \
}while(0U)
#define RCC_BDCR_LSEON
Definition: stm32f303xe.h:11220
#define RCC_BDCR_LSEBYP
Definition: stm32f303xe.h:11226
#define RCC
Definition: stm32f303xe.h:977
#define RCC_LSE_OFF
Definition: stm32f3xx_hal_rcc.h:370
#define RCC_LSE_BYPASS
Definition: stm32f3xx_hal_rcc.h:372
#define RCC_LSE_ON
Definition: stm32f3xx_hal_rcc.h:371

Macro to configure the External Low Speed oscillator (LSE).

Note
Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not supported by this macro.
As the LSE is in the Backup domain and write access is denied to this domain after reset, you have to enable write access using HAL_PWR_EnableBkUpAccess() function before to configure the LSE (to be done once after reset).
After enabling the LSE (RCC_LSE_ON or RCC_LSE_BYPASS), the application software should wait on LSERDY flag to be set indicating that LSE clock is stable and can be used to clock the RTC.
Parameters
__STATE__specifies the new state of the LSE. This parameter can be one of the following values:
  • RCC_LSE_OFF turn OFF the LSE oscillator, LSERDY flag goes low after 6 LSE oscillator clock cycles.
  • RCC_LSE_ON turn ON the LSE oscillator.
  • RCC_LSE_BYPASS LSE oscillator bypassed with external clock.