TIM DMA Sources

Macros
#define	TIM_DMA_UPDATE   TIM_DIER_UDE
#define	TIM_DMA_CC1   TIM_DIER_CC1DE
#define	TIM_DMA_CC2   TIM_DIER_CC2DE
#define	TIM_DMA_CC3   TIM_DIER_CC3DE
#define	TIM_DMA_CC4   TIM_DIER_CC4DE
#define	TIM_DMA_COM   TIM_DIER_COMDE
#define	TIM_DMA_TRIGGER   TIM_DIER_TDE

Detailed Description

Macro Definition Documentation

TIM_DMA_CC1

#define TIM_DMA_CC1   TIM_DIER_CC1DE

DMA request is triggered by the capture/compare macth 1 event

TIM_DMA_CC2

#define TIM_DMA_CC2   TIM_DIER_CC2DE

DMA request is triggered by the capture/compare macth 2 event event

TIM_DMA_CC3

#define TIM_DMA_CC3   TIM_DIER_CC3DE

DMA request is triggered by the capture/compare macth 3 event event

TIM_DMA_CC4

#define TIM_DMA_CC4   TIM_DIER_CC4DE

DMA request is triggered by the capture/compare macth 4 event event

TIM_DMA_COM

#define TIM_DMA_COM   TIM_DIER_COMDE

DMA request is triggered by the commutation event

TIM_DMA_TRIGGER

#define TIM_DMA_TRIGGER   TIM_DIER_TDE

DMA request is triggered by the trigger event

TIM_DMA_UPDATE

#define TIM_DMA_UPDATE   TIM_DIER_UDE

DMA request is triggered by the update event