Macros
#define	TIM_OCMODE_TIMING 0x00000000U

#define	TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0

#define	TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1

#define	TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1)

#define	TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

Detailed Description

Macro Definition Documentation

#define TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0

Set channel to active level on match

#define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)

Force active level

#define TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

Force inactive level

#define TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1

Set channel to inactive level on match

#define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)

PWM mode 1

PWM mode 2

#define TIM_OCMODE_TIMING 0x00000000U

Frozen

#define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)

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