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stm32f3xx_ll_gpio.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef __STM32F3xx_LL_GPIO_H
21#define __STM32F3xx_LL_GPIO_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32f3xx.h"
29
34#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH)
35
40/* Private types -------------------------------------------------------------*/
41/* Private variables ---------------------------------------------------------*/
42/* Private constants ---------------------------------------------------------*/
43/* Private macros ------------------------------------------------------------*/
44#if defined(USE_FULL_LL_DRIVER)
52#endif /*USE_FULL_LL_DRIVER*/
53
54/* Exported types ------------------------------------------------------------*/
55#if defined(USE_FULL_LL_DRIVER)
63typedef struct
64{
65 uint32_t Pin;
68 uint32_t Mode;
73 uint32_t Speed;
78 uint32_t OutputType;
83 uint32_t Pull;
88 uint32_t Alternate;
92} LL_GPIO_InitTypeDef;
93
97#endif /* USE_FULL_LL_DRIVER */
98
99/* Exported constants --------------------------------------------------------*/
107#define LL_GPIO_PIN_0 GPIO_BSRR_BS_0
108#define LL_GPIO_PIN_1 GPIO_BSRR_BS_1
109#define LL_GPIO_PIN_2 GPIO_BSRR_BS_2
110#define LL_GPIO_PIN_3 GPIO_BSRR_BS_3
111#define LL_GPIO_PIN_4 GPIO_BSRR_BS_4
112#define LL_GPIO_PIN_5 GPIO_BSRR_BS_5
113#define LL_GPIO_PIN_6 GPIO_BSRR_BS_6
114#define LL_GPIO_PIN_7 GPIO_BSRR_BS_7
115#define LL_GPIO_PIN_8 GPIO_BSRR_BS_8
116#define LL_GPIO_PIN_9 GPIO_BSRR_BS_9
117#define LL_GPIO_PIN_10 GPIO_BSRR_BS_10
118#define LL_GPIO_PIN_11 GPIO_BSRR_BS_11
119#define LL_GPIO_PIN_12 GPIO_BSRR_BS_12
120#define LL_GPIO_PIN_13 GPIO_BSRR_BS_13
121#define LL_GPIO_PIN_14 GPIO_BSRR_BS_14
122#define LL_GPIO_PIN_15 GPIO_BSRR_BS_15
123#define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
124 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
125 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
126 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
127 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
128 GPIO_BSRR_BS_15)
136#define LL_GPIO_MODE_INPUT (0x00000000U)
137#define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0
138#define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1
139#define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0
147#define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U)
148#define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0
156#define LL_GPIO_SPEED_FREQ_LOW (0x00000000U)
157#define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0
158#define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0
166#define LL_GPIO_PULL_NO (0x00000000U)
167#define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0
168#define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1
176#define LL_GPIO_AF_0 (0x0000000U)
177#define LL_GPIO_AF_1 (0x0000001U)
178#define LL_GPIO_AF_2 (0x0000002U)
179#define LL_GPIO_AF_3 (0x0000003U)
180#define LL_GPIO_AF_4 (0x0000004U)
181#define LL_GPIO_AF_5 (0x0000005U)
182#define LL_GPIO_AF_6 (0x0000006U)
183#define LL_GPIO_AF_7 (0x0000007U)
184#define LL_GPIO_AF_8 (0x0000008U)
185#define LL_GPIO_AF_9 (0x0000009U)
186#define LL_GPIO_AF_10 (0x000000AU)
187#define LL_GPIO_AF_11 (0x000000BU)
188#define LL_GPIO_AF_12 (0x000000CU)
189#define LL_GPIO_AF_13 (0x000000DU)
190#define LL_GPIO_AF_14 (0x000000EU)
191#define LL_GPIO_AF_15 (0x000000FU)
200/* Exported macro ------------------------------------------------------------*/
216#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
217
224#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
233/* Exported functions --------------------------------------------------------*/
272__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
273{
274 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
275}
276
306__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
307{
308 return (uint32_t)(READ_BIT(GPIOx->MODER,
309 (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
310}
311
341__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
342{
343 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
344}
345
375__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
376{
377 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
378}
379
411__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
412{
413 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
414 (Speed << (POSITION_VAL(Pin) * 2U)));
415}
416
447__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
448{
449 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
450 (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
451}
452
481__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
482{
483 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
484}
485
513__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
514{
515 return (uint32_t)(READ_BIT(GPIOx->PUPDR,
516 (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
517}
518
553__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
554{
555 MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U)),
556 (Alternate << (POSITION_VAL(Pin) * 4U)));
557}
558
590__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
591{
592 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
593 (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
594}
595
630__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
631{
632 MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U)),
633 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
634}
635
668__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
669{
670 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
671 (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
672}
673
674
704__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
705{
706 __IO uint32_t temp;
707 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
708 WRITE_REG(GPIOx->LCKR, PinMask);
709 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
710 temp = READ_REG(GPIOx->LCKR);
711 (void) temp;
712}
713
738__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
739{
740 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
741}
742
749__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
750{
751 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
752}
753
768__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
769{
770 return (uint32_t)(READ_REG(GPIOx->IDR));
771}
772
797__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
798{
799 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
800}
801
809__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
810{
811 WRITE_REG(GPIOx->ODR, PortValue);
812}
813
820__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
821{
822 return (uint32_t)(READ_REG(GPIOx->ODR));
823}
824
849__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
850{
851 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
852}
853
878__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
879{
880 WRITE_REG(GPIOx->BSRR, PinMask);
881}
882
907__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
908{
909 WRITE_REG(GPIOx->BRR, PinMask);
910}
911
936__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
937{
938 uint32_t odr = READ_REG(GPIOx->ODR);
939 WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
940}
941
946#if defined(USE_FULL_LL_DRIVER)
951ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
952ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
953void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
954
958#endif /* USE_FULL_LL_DRIVER */
959
968#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) */
973#ifdef __cplusplus
974}
975#endif
976
977#endif /* __STM32F3xx_LL_GPIO_H */
978
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
#define __IO
Definition: core_armv8mbl.h:196
#define WRITE_REG(REG, VAL)
Definition: stm32f3xx.h:198
#define POSITION_VAL(VAL)
Definition: stm32f3xx.h:204
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f3xx.h:202
#define READ_BIT(REG, BIT)
Definition: stm32f3xx.h:194
#define READ_REG(REG)
Definition: stm32f3xx.h:200
ErrorStatus
Definition: stm32f3xx.h:177
#define GPIO_PUPDR_PUPDR0
Definition: stm32f303xe.h:10033
#define GPIO_MODER_MODER0
Definition: stm32f303xe.h:9851
#define GPIO_OSPEEDER_OSPEEDR0
Definition: stm32f303xe.h:9951
#define GPIO_AFRH_AFRH0
Definition: stm32f303xe.h:10264
#define GPIO_AFRL_AFRL0
Definition: stm32f303xe.h:10238
#define GPIO_LCKR_LCKK
Definition: stm32f303xe.h:10233
CMSIS STM32F3xx Device Peripheral Access Layer Header File.
General Purpose I/O.
Definition: stm32f303xe.h:475
__IO uint32_t OSPEEDR
Definition: stm32f303xe.h:478
__IO uint32_t AFR[2]
Definition: stm32f303xe.h:484
__IO uint32_t PUPDR
Definition: stm32f303xe.h:479
__IO uint32_t ODR
Definition: stm32f303xe.h:481
__IO uint32_t OTYPER
Definition: stm32f303xe.h:477
__IO uint32_t LCKR
Definition: stm32f303xe.h:483
__IO uint32_t BRR
Definition: stm32f303xe.h:485
__IO uint32_t MODER
Definition: stm32f303xe.h:476
__IO uint32_t BSRR
Definition: stm32f303xe.h:482
__IO uint32_t IDR
Definition: stm32f303xe.h:480