Analog to Digital Converter. More...

#include <stm32f303xe.h>

Public Attributes
__IO uint32_t	ISR

__IO uint32_t	IER

__IO uint32_t	CR

__IO uint32_t	CFGR

uint32_t	RESERVED0

__IO uint32_t	SMPR1

__IO uint32_t	SMPR2

uint32_t	RESERVED1

__IO uint32_t	TR1

__IO uint32_t	TR2

__IO uint32_t	TR3

uint32_t	RESERVED2

__IO uint32_t	SQR1

__IO uint32_t	SQR2

__IO uint32_t	SQR3

__IO uint32_t	SQR4

__IO uint32_t	DR

uint32_t	RESERVED3

uint32_t	RESERVED4

__IO uint32_t	JSQR

uint32_t	RESERVED5 [4]

__IO uint32_t	OFR1

__IO uint32_t	OFR2

__IO uint32_t	OFR3

__IO uint32_t	OFR4

uint32_t	RESERVED6 [4]

__IO uint32_t	JDR1

__IO uint32_t	JDR2

__IO uint32_t	JDR3

__IO uint32_t	JDR4

uint32_t	RESERVED7 [4]

__IO uint32_t	AWD2CR

__IO uint32_t	AWD3CR

uint32_t	RESERVED8

uint32_t	RESERVED9

__IO uint32_t	DIFSEL

__IO uint32_t	CALFACT

Detailed Description

Analog to Digital Converter.

Member Data Documentation

◆ AWD2CR

__IO uint32_t ADC_TypeDef::AWD2CR

ADC Analog Watchdog 2 Configuration Register, Address offset: 0xA0

◆ AWD3CR

__IO uint32_t ADC_TypeDef::AWD3CR

ADC Analog Watchdog 3 Configuration Register, Address offset: 0xA4

◆ CALFACT

__IO uint32_t ADC_TypeDef::CALFACT

ADC Calibration Factors, Address offset: 0xB4

◆ CFGR

__IO uint32_t ADC_TypeDef::CFGR

ADC Configuration register, Address offset: 0x0C

◆ CR

__IO uint32_t ADC_TypeDef::CR

ADC control register, Address offset: 0x08

◆ DIFSEL

__IO uint32_t ADC_TypeDef::DIFSEL

ADC Differential Mode Selection Register, Address offset: 0xB0

◆ DR

__IO uint32_t ADC_TypeDef::DR

ADC regular data register, Address offset: 0x40

◆ IER

__IO uint32_t ADC_TypeDef::IER

ADC Interrupt Enable Register, Address offset: 0x04

◆ ISR

__IO uint32_t ADC_TypeDef::ISR

ADC Interrupt and Status Register, Address offset: 0x00

◆ JDR1

__IO uint32_t ADC_TypeDef::JDR1

ADC injected data register 1, Address offset: 0x80

◆ JDR2

__IO uint32_t ADC_TypeDef::JDR2

ADC injected data register 2, Address offset: 0x84

◆ JDR3

__IO uint32_t ADC_TypeDef::JDR3

ADC injected data register 3, Address offset: 0x88

◆ JDR4

__IO uint32_t ADC_TypeDef::JDR4

ADC injected data register 4, Address offset: 0x8C

◆ JSQR

__IO uint32_t ADC_TypeDef::JSQR

ADC injected sequence register, Address offset: 0x4C

◆ OFR1

__IO uint32_t ADC_TypeDef::OFR1

ADC offset register 1, Address offset: 0x60

◆ OFR2

__IO uint32_t ADC_TypeDef::OFR2

ADC offset register 2, Address offset: 0x64

◆ OFR3

__IO uint32_t ADC_TypeDef::OFR3

ADC offset register 3, Address offset: 0x68

◆ OFR4

__IO uint32_t ADC_TypeDef::OFR4

ADC offset register 4, Address offset: 0x6C

◆ RESERVED0

uint32_t ADC_TypeDef::RESERVED0

Reserved, 0x010

◆ RESERVED1

uint32_t ADC_TypeDef::RESERVED1

Reserved, 0x01C

◆ RESERVED2

uint32_t ADC_TypeDef::RESERVED2

Reserved, 0x02C

◆ RESERVED3

uint32_t ADC_TypeDef::RESERVED3

Reserved, 0x044

◆ RESERVED4

uint32_t ADC_TypeDef::RESERVED4

Reserved, 0x048

◆ RESERVED5

uint32_t ADC_TypeDef::RESERVED5[4]

Reserved, 0x050 - 0x05C

◆ RESERVED6

uint32_t ADC_TypeDef::RESERVED6[4]

Reserved, 0x070 - 0x07C

◆ RESERVED7

uint32_t ADC_TypeDef::RESERVED7[4]

Reserved, 0x090 - 0x09C

◆ RESERVED8

uint32_t ADC_TypeDef::RESERVED8

Reserved, 0x0A8

◆ RESERVED9

uint32_t ADC_TypeDef::RESERVED9

Reserved, 0x0AC

◆ SMPR1

__IO uint32_t ADC_TypeDef::SMPR1

ADC sample time register 1, Address offset: 0x14

◆ SMPR2

__IO uint32_t ADC_TypeDef::SMPR2

ADC sample time register 2, Address offset: 0x18

◆ SQR1

__IO uint32_t ADC_TypeDef::SQR1

ADC regular sequence register 1, Address offset: 0x30

◆ SQR2

__IO uint32_t ADC_TypeDef::SQR2

ADC regular sequence register 2, Address offset: 0x34

◆ SQR3

__IO uint32_t ADC_TypeDef::SQR3

ADC regular sequence register 3, Address offset: 0x38

◆ SQR4

__IO uint32_t ADC_TypeDef::SQR4

ADC regular sequence register 4, Address offset: 0x3C

◆ TR1

__IO uint32_t ADC_TypeDef::TR1

ADC watchdog threshold register 1, Address offset: 0x20

◆ TR2

__IO uint32_t ADC_TypeDef::TR2

ADC watchdog threshold register 2, Address offset: 0x24

◆ TR3

__IO uint32_t ADC_TypeDef::TR3

ADC watchdog threshold register 3, Address offset: 0x28

The documentation for this struct was generated from the following file:

Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h

Public Attributes