Touch Sensing Controller (TSC) More...

#include <stm32f303xe.h>

Public Attributes
__IO uint32_t	CR

__IO uint32_t	IER

__IO uint32_t	ICR

__IO uint32_t	ISR

__IO uint32_t	IOHCR

uint32_t	RESERVED1

__IO uint32_t	IOASCR

uint32_t	RESERVED2

__IO uint32_t	IOSCR

uint32_t	RESERVED3

__IO uint32_t	IOCCR

uint32_t	RESERVED4

__IO uint32_t	IOGCSR

__IO uint32_t	IOGXCR [8]

Detailed Description

Touch Sensing Controller (TSC)

Member Data Documentation

◆ CR

__IO uint32_t TSC_TypeDef::CR

TSC control register, Address offset: 0x00

◆ ICR

__IO uint32_t TSC_TypeDef::ICR

TSC interrupt clear register, Address offset: 0x08

◆ IER

__IO uint32_t TSC_TypeDef::IER

TSC interrupt enable register, Address offset: 0x04

◆ IOASCR

__IO uint32_t TSC_TypeDef::IOASCR

TSC I/O analog switch control register, Address offset: 0x18

◆ IOCCR

__IO uint32_t TSC_TypeDef::IOCCR

TSC I/O channel control register, Address offset: 0x28

◆ IOGCSR

__IO uint32_t TSC_TypeDef::IOGCSR

TSC I/O group control status register, Address offset: 0x30

◆ IOGXCR

__IO uint32_t TSC_TypeDef::IOGXCR[8]

TSC I/O group x counter register, Address offset: 0x34-50

◆ IOHCR

__IO uint32_t TSC_TypeDef::IOHCR

TSC I/O hysteresis control register, Address offset: 0x10

◆ IOSCR

__IO uint32_t TSC_TypeDef::IOSCR

TSC I/O sampling control register, Address offset: 0x20

◆ ISR

__IO uint32_t TSC_TypeDef::ISR

TSC interrupt status register, Address offset: 0x0C

◆ RESERVED1

uint32_t TSC_TypeDef::RESERVED1

Reserved, Address offset: 0x14

◆ RESERVED2

uint32_t TSC_TypeDef::RESERVED2

Reserved, Address offset: 0x1C

◆ RESERVED3

uint32_t TSC_TypeDef::RESERVED3

Reserved, Address offset: 0x24

◆ RESERVED4

uint32_t TSC_TypeDef::RESERVED4

Reserved, Address offset: 0x2C

The documentation for this struct was generated from the following file:

Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h

Public Attributes