Universal Synchronous Asynchronous Receiver Transmitter. More...

#include <stm32f303xe.h>

Public Attributes
__IO uint32_t	CR1

__IO uint32_t	CR2

__IO uint32_t	CR3

__IO uint32_t	BRR

__IO uint32_t	GTPR

__IO uint32_t	RTOR

__IO uint32_t	RQR

__IO uint32_t	ISR

__IO uint32_t	ICR

__IO uint16_t	RDR

uint16_t	RESERVED1

__IO uint16_t	TDR

uint16_t	RESERVED2

Detailed Description

Universal Synchronous Asynchronous Receiver Transmitter.

Member Data Documentation

◆ BRR

__IO uint32_t USART_TypeDef::BRR

USART Baud rate register, Address offset: 0x0C

◆ CR1

__IO uint32_t USART_TypeDef::CR1

USART Control register 1, Address offset: 0x00

◆ CR2

__IO uint32_t USART_TypeDef::CR2

USART Control register 2, Address offset: 0x04

◆ CR3

__IO uint32_t USART_TypeDef::CR3

USART Control register 3, Address offset: 0x08

◆ GTPR

__IO uint32_t USART_TypeDef::GTPR

USART Guard time and prescaler register, Address offset: 0x10

◆ ICR

__IO uint32_t USART_TypeDef::ICR

USART Interrupt flag Clear register, Address offset: 0x20

◆ ISR

__IO uint32_t USART_TypeDef::ISR

USART Interrupt and status register, Address offset: 0x1C

◆ RDR

__IO uint16_t USART_TypeDef::RDR

USART Receive Data register, Address offset: 0x24

◆ RESERVED1

uint16_t USART_TypeDef::RESERVED1

Reserved, 0x26

◆ RESERVED2

uint16_t USART_TypeDef::RESERVED2

Reserved, 0x2A

◆ RQR

__IO uint32_t USART_TypeDef::RQR

USART Request register, Address offset: 0x18

◆ RTOR

__IO uint32_t USART_TypeDef::RTOR

USART Receiver Time Out register, Address offset: 0x14

◆ TDR

__IO uint16_t USART_TypeDef::TDR

USART Transmit Data register, Address offset: 0x28

The documentation for this struct was generated from the following file:

Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h

Public Attributes