RCC AHB Clock Enable Disable

Enable or disable the AHB peripheral clock. More...

Macros
#define	__HAL_RCC_GPIOA_CLK_ENABLE()
#define	__HAL_RCC_GPIOB_CLK_ENABLE()
#define	__HAL_RCC_GPIOC_CLK_ENABLE()
#define	__HAL_RCC_GPIOD_CLK_ENABLE()
#define	__HAL_RCC_GPIOF_CLK_ENABLE()
#define	__HAL_RCC_CRC_CLK_ENABLE()
#define	__HAL_RCC_DMA1_CLK_ENABLE()
#define	__HAL_RCC_SRAM_CLK_ENABLE()
#define	__HAL_RCC_FLITF_CLK_ENABLE()
#define	__HAL_RCC_TSC_CLK_ENABLE()
#define	__HAL_RCC_GPIOA_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN))
#define	__HAL_RCC_GPIOB_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_GPIOBEN))
#define	__HAL_RCC_GPIOC_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_GPIOCEN))
#define	__HAL_RCC_GPIOD_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_GPIODEN))
#define	__HAL_RCC_GPIOF_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_GPIOFEN))
#define	__HAL_RCC_CRC_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_CRCEN))
#define	__HAL_RCC_DMA1_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_DMA1EN))
#define	__HAL_RCC_SRAM_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_SRAMEN))
#define	__HAL_RCC_FLITF_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_FLITFEN))
#define	__HAL_RCC_TSC_CLK_DISABLE()   (RCC->AHBENR &= ~(RCC_AHBENR_TSCEN))

Detailed Description

Enable or disable the AHB peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

__HAL_RCC_CRC_CLK_DISABLE

#define __HAL_RCC_CRC_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_CRCEN))

__HAL_RCC_CRC_CLK_ENABLE

#define __HAL_RCC_CRC_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_DMA1_CLK_DISABLE

#define __HAL_RCC_DMA1_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_DMA1EN))

__HAL_RCC_DMA1_CLK_ENABLE

#define __HAL_RCC_DMA1_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_FLITF_CLK_DISABLE

#define __HAL_RCC_FLITF_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_FLITFEN))

__HAL_RCC_FLITF_CLK_ENABLE

#define __HAL_RCC_FLITF_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_GPIOA_CLK_DISABLE

#define __HAL_RCC_GPIOA_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN))

__HAL_RCC_GPIOA_CLK_ENABLE

#define __HAL_RCC_GPIOA_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOAEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOAEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_GPIOB_CLK_DISABLE

#define __HAL_RCC_GPIOB_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_GPIOBEN))

__HAL_RCC_GPIOB_CLK_ENABLE

#define __HAL_RCC_GPIOB_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOBEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOBEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_GPIOC_CLK_DISABLE

#define __HAL_RCC_GPIOC_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_GPIOCEN))

__HAL_RCC_GPIOC_CLK_ENABLE

#define __HAL_RCC_GPIOC_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_GPIOD_CLK_DISABLE

#define __HAL_RCC_GPIOD_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_GPIODEN))

__HAL_RCC_GPIOD_CLK_ENABLE

#define __HAL_RCC_GPIOD_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_GPIOF_CLK_DISABLE

#define __HAL_RCC_GPIOF_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_GPIOFEN))

__HAL_RCC_GPIOF_CLK_ENABLE

#define __HAL_RCC_GPIOF_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_SRAM_CLK_DISABLE

#define __HAL_RCC_SRAM_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_SRAMEN))

__HAL_RCC_SRAM_CLK_ENABLE

#define __HAL_RCC_SRAM_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_SRAMEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_SRAMEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

__HAL_RCC_TSC_CLK_DISABLE

#define __HAL_RCC_TSC_CLK_DISABLE

(

)

(RCC->AHBENR &= ~(RCC_AHBENR_TSCEN))

__HAL_RCC_TSC_CLK_ENABLE

#define __HAL_RCC_TSC_CLK_ENABLE

(

)

Value:

                                        do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)