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stm32f3xx_ll_usart.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32F3xx_LL_USART_H
21#define STM32F3xx_LL_USART_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32f3xx.h"
29
34#if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5)
35
40/* Private types -------------------------------------------------------------*/
41/* Private variables ---------------------------------------------------------*/
42
43/* Private constants ---------------------------------------------------------*/
50/* Private macros ------------------------------------------------------------*/
51#if defined(USE_FULL_LL_DRIVER)
58#endif /*USE_FULL_LL_DRIVER*/
59
60/* Exported types ------------------------------------------------------------*/
61#if defined(USE_FULL_LL_DRIVER)
69typedef struct
70{
71
72 uint32_t BaudRate;
77 uint32_t DataWidth;
83 uint32_t StopBits;
89 uint32_t Parity;
95 uint32_t TransferDirection;
101 uint32_t HardwareFlowControl;
107 uint32_t OverSampling;
113} LL_USART_InitTypeDef;
114
118typedef struct
119{
120 uint32_t ClockOutput;
127 uint32_t ClockPolarity;
134 uint32_t ClockPhase;
141 uint32_t LastBitClockPulse;
149} LL_USART_ClockInitTypeDef;
150
154#endif /* USE_FULL_LL_DRIVER */
155
156/* Exported constants --------------------------------------------------------*/
165#define LL_USART_ICR_PECF USART_ICR_PECF
166#define LL_USART_ICR_FECF USART_ICR_FECF
167#define LL_USART_ICR_NCF USART_ICR_NCF
168#define LL_USART_ICR_ORECF USART_ICR_ORECF
169#define LL_USART_ICR_IDLECF USART_ICR_IDLECF
170#define LL_USART_ICR_TCCF USART_ICR_TCCF
171#define LL_USART_ICR_LBDCF USART_ICR_LBDCF
172#define LL_USART_ICR_CTSCF USART_ICR_CTSCF
173#define LL_USART_ICR_RTOCF USART_ICR_RTOCF
174#define LL_USART_ICR_EOBCF USART_ICR_EOBCF
175#define LL_USART_ICR_CMCF USART_ICR_CMCF
176#define LL_USART_ICR_WUCF USART_ICR_WUCF
185#define LL_USART_ISR_PE USART_ISR_PE
186#define LL_USART_ISR_FE USART_ISR_FE
187#define LL_USART_ISR_NE USART_ISR_NE
188#define LL_USART_ISR_ORE USART_ISR_ORE
189#define LL_USART_ISR_IDLE USART_ISR_IDLE
190#define LL_USART_ISR_RXNE USART_ISR_RXNE
191#define LL_USART_ISR_TC USART_ISR_TC
192#define LL_USART_ISR_TXE USART_ISR_TXE
193#define LL_USART_ISR_LBDF USART_ISR_LBDF
194#define LL_USART_ISR_CTSIF USART_ISR_CTSIF
195#define LL_USART_ISR_CTS USART_ISR_CTS
196#define LL_USART_ISR_RTOF USART_ISR_RTOF
197#define LL_USART_ISR_EOBF USART_ISR_EOBF
198#define LL_USART_ISR_ABRE USART_ISR_ABRE
199#define LL_USART_ISR_ABRF USART_ISR_ABRF
200#define LL_USART_ISR_BUSY USART_ISR_BUSY
201#define LL_USART_ISR_CMF USART_ISR_CMF
202#define LL_USART_ISR_SBKF USART_ISR_SBKF
203#define LL_USART_ISR_RWU USART_ISR_RWU
204#define LL_USART_ISR_WUF USART_ISR_WUF
205#define LL_USART_ISR_TEACK USART_ISR_TEACK
206#define LL_USART_ISR_REACK USART_ISR_REACK
215#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE
216#define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE
217#define LL_USART_CR1_TCIE USART_CR1_TCIE
218#define LL_USART_CR1_TXEIE USART_CR1_TXEIE
219#define LL_USART_CR1_PEIE USART_CR1_PEIE
220#define LL_USART_CR1_CMIE USART_CR1_CMIE
221#define LL_USART_CR1_RTOIE USART_CR1_RTOIE
222#define LL_USART_CR1_EOBIE USART_CR1_EOBIE
223#define LL_USART_CR2_LBDIE USART_CR2_LBDIE
224#define LL_USART_CR3_EIE USART_CR3_EIE
225#define LL_USART_CR3_CTSIE USART_CR3_CTSIE
226#define LL_USART_CR3_WUFIE USART_CR3_WUFIE
234#define LL_USART_DIRECTION_NONE 0x00000000U
235#define LL_USART_DIRECTION_RX USART_CR1_RE
236#define LL_USART_DIRECTION_TX USART_CR1_TE
237#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE)
245#define LL_USART_PARITY_NONE 0x00000000U
246#define LL_USART_PARITY_EVEN USART_CR1_PCE
247#define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS)
255#define LL_USART_WAKEUP_IDLELINE 0x00000000U
256#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE
264#if defined(USART_7BITS_SUPPORT)
265#define LL_USART_DATAWIDTH_7B USART_CR1_M1
266#define LL_USART_DATAWIDTH_8B 0x00000000U
267#define LL_USART_DATAWIDTH_9B USART_CR1_M0
268#else
269#define LL_USART_DATAWIDTH_8B 0x00000000U
270#define LL_USART_DATAWIDTH_9B USART_CR1_M
271#endif /* USART_7BITS_SUPPORT */
279#define LL_USART_OVERSAMPLING_16 0x00000000U
280#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8
285#if defined(USE_FULL_LL_DRIVER)
290#define LL_USART_CLOCK_DISABLE 0x00000000U
291#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN
295#endif /*USE_FULL_LL_DRIVER*/
296
300#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U
301#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL
309#define LL_USART_PHASE_1EDGE 0x00000000U
310#define LL_USART_PHASE_2EDGE USART_CR2_CPHA
318#define LL_USART_POLARITY_LOW 0x00000000U
319#define LL_USART_POLARITY_HIGH USART_CR2_CPOL
327#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0
328#define LL_USART_STOPBITS_1 0x00000000U
329#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1)
330#define LL_USART_STOPBITS_2 USART_CR2_STOP_1
338#define LL_USART_TXRX_STANDARD 0x00000000U
339#define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP)
347#define LL_USART_RXPIN_LEVEL_STANDARD 0x00000000U
348#define LL_USART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV)
356#define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U
357#define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV)
365#define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U
366#define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV
374#define LL_USART_BITORDER_LSBFIRST 0x00000000U
375#define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST
383#define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT 0x00000000U
384#define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0
385#define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1
386#define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0)
394#define LL_USART_ADDRESS_DETECT_4B 0x00000000U
395#define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7
403#define LL_USART_HWCONTROL_NONE 0x00000000U
404#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE
405#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE
406#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)
414#define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U
415#define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1
416#define LL_USART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1)
424#define LL_USART_IRDA_POWER_NORMAL 0x00000000U
425#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP
433#define LL_USART_LINBREAK_DETECT_10B 0x00000000U
434#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL
442#define LL_USART_DE_POLARITY_HIGH 0x00000000U
443#define LL_USART_DE_POLARITY_LOW USART_CR3_DEP
451#define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U
452#define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U
461/* Exported macro ------------------------------------------------------------*/
477#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
478
485#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
501#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2U)\
502 + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
503
511#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
512
521/* Exported functions --------------------------------------------------------*/
522
537__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
538{
539 SET_BIT(USARTx->CR1, USART_CR1_UE);
540}
541
551__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
552{
553 CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
554}
555
562__STATIC_INLINE uint32_t LL_USART_IsEnabled(const USART_TypeDef *USARTx)
563{
564 return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
565}
566
577__STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
578{
580}
581
591__STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
592{
594}
595
604__STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(const USART_TypeDef *USARTx)
605{
606 return ((READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
607}
608
615__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
616{
618}
619
626__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
627{
629}
630
637__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
638{
640}
641
648__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
649{
651}
652
666__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
667{
668 ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
669}
670
682__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(const USART_TypeDef *USARTx)
683{
684 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
685}
686
701__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
702{
703 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
704}
705
716__STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx)
717{
718 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
719}
720
730__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
731{
732 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
733}
734
743__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(const USART_TypeDef *USARTx)
744{
745 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
746}
747
761__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
762{
763 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
764}
765
778__STATIC_INLINE uint32_t LL_USART_GetDataWidth(const USART_TypeDef *USARTx)
779{
780 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
781}
782
789__STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
790{
792}
793
800__STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
801{
803}
804
811__STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(const USART_TypeDef *USARTx)
812{
813 return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
814}
815
825__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
826{
827 MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
828}
829
838__STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx)
839{
840 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
841}
842
854__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
855{
856 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
857}
858
870__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(const USART_TypeDef *USARTx)
871{
872 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
873}
874
886__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
887{
888 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
889}
890
901__STATIC_INLINE uint32_t LL_USART_GetClockPhase(const USART_TypeDef *USARTx)
902{
903 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
904}
905
917__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
918{
919 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
920}
921
932__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(const USART_TypeDef *USARTx)
933{
934 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
935}
936
960__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
961{
962 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
963}
964
973__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
974{
975 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
976}
977
986__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
987{
988 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
989}
990
999__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx)
1000{
1001 return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL);
1002}
1003
1015__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
1016{
1017 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
1018}
1019
1030__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(const USART_TypeDef *USARTx)
1031{
1032 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
1033}
1034
1064__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
1065 uint32_t StopBits)
1066{
1067 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1068 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
1069}
1070
1080__STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
1081{
1082 MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
1083}
1084
1093__STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(const USART_TypeDef *USARTx)
1094{
1095 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP));
1096}
1097
1107__STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1108{
1109 MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod);
1110}
1111
1120__STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(const USART_TypeDef *USARTx)
1121{
1122 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV));
1123}
1124
1134__STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1135{
1136 MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
1137}
1138
1147__STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(const USART_TypeDef *USARTx)
1148{
1149 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV));
1150}
1151
1163__STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
1164{
1165 MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic);
1166}
1167
1176__STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(const USART_TypeDef *USARTx)
1177{
1178 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV));
1179}
1180
1192__STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
1193{
1194 MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
1195}
1196
1207__STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(const USART_TypeDef *USARTx)
1208{
1209 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST));
1210}
1211
1220__STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
1221{
1222 SET_BIT(USARTx->CR2, USART_CR2_ABREN);
1223}
1224
1233__STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
1234{
1235 CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN);
1236}
1237
1246__STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(const USART_TypeDef *USARTx)
1247{
1248 return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL);
1249}
1250
1264__STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
1265{
1266 MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode);
1267}
1268
1281__STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(const USART_TypeDef *USARTx)
1282{
1283 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
1284}
1285
1292__STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
1293{
1294 SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
1295}
1296
1303__STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
1304{
1305 CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
1306}
1307
1314__STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(const USART_TypeDef *USARTx)
1315{
1316 return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL);
1317}
1318
1342__STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress)
1343{
1345 (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
1346}
1347
1358__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(const USART_TypeDef *USARTx)
1359{
1360 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
1361}
1362
1371__STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(const USART_TypeDef *USARTx)
1372{
1373 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7));
1374}
1375
1384__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1385{
1386 SET_BIT(USARTx->CR3, USART_CR3_RTSE);
1387}
1388
1397__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1398{
1399 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
1400}
1401
1410__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1411{
1412 SET_BIT(USARTx->CR3, USART_CR3_CTSE);
1413}
1414
1423__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1424{
1425 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
1426}
1427
1442__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
1443{
1444 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
1445}
1446
1460__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(const USART_TypeDef *USARTx)
1461{
1462 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1463}
1464
1471__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
1472{
1473 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1474}
1475
1482__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
1483{
1484 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1485}
1486
1493__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(const USART_TypeDef *USARTx)
1494{
1495 return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);
1496}
1497
1504__STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
1505{
1506 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1507}
1508
1515__STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
1516{
1517 SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1518}
1519
1526__STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(const USART_TypeDef *USARTx)
1527{
1528 return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
1529}
1530
1543__STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type)
1544{
1545 MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);
1546}
1547
1559__STATIC_INLINE uint32_t LL_USART_GetWKUPType(const USART_TypeDef *USARTx)
1560{
1561 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));
1562}
1563
1580__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
1581 uint32_t BaudRate)
1582{
1583 uint32_t usartdiv;
1584 uint32_t brrtemp;
1585
1586 if (OverSampling == LL_USART_OVERSAMPLING_8)
1587 {
1588 usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
1589 brrtemp = usartdiv & 0xFFF0U;
1590 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
1591 USARTx->BRR = brrtemp;
1592 }
1593 else
1594 {
1595 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
1596 }
1597}
1598
1612__STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
1613{
1614 uint32_t usartdiv;
1615 uint32_t brrresult = 0x0U;
1616
1617 usartdiv = USARTx->BRR;
1618
1619 if (usartdiv == 0U)
1620 {
1621 /* Do not perform a division by 0 */
1622 }
1623 else if (OverSampling == LL_USART_OVERSAMPLING_8)
1624 {
1625 usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
1626 if (usartdiv != 0U)
1627 {
1628 brrresult = (PeriphClk * 2U) / usartdiv;
1629 }
1630 }
1631 else
1632 {
1633 if ((usartdiv & 0xFFFFU) != 0U)
1634 {
1635 brrresult = PeriphClk / usartdiv;
1636 }
1637 }
1638 return (brrresult);
1639}
1640
1648__STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout)
1649{
1650 MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout);
1651}
1652
1659__STATIC_INLINE uint32_t LL_USART_GetRxTimeout(const USART_TypeDef *USARTx)
1660{
1661 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO));
1662}
1663
1671__STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength)
1672{
1673 MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_RTOR_BLEN_Pos);
1674}
1675
1682__STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx)
1683{
1684 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos);
1685}
1686
1703__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
1704{
1705 SET_BIT(USARTx->CR3, USART_CR3_IREN);
1706}
1707
1716__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
1717{
1718 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
1719}
1720
1729__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(const USART_TypeDef *USARTx)
1730{
1731 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);
1732}
1733
1745__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
1746{
1747 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
1748}
1749
1760__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx)
1761{
1762 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
1763}
1764
1775__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
1776{
1777 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue);
1778}
1779
1789__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(const USART_TypeDef *USARTx)
1790{
1791 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
1792}
1793
1810__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
1811{
1812 SET_BIT(USARTx->CR3, USART_CR3_NACK);
1813}
1814
1823__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
1824{
1825 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
1826}
1827
1836__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(const USART_TypeDef *USARTx)
1837{
1838 return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);
1839}
1840
1849__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
1850{
1851 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
1852}
1853
1862__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
1863{
1864 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
1865}
1866
1875__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(const USART_TypeDef *USARTx)
1876{
1877 return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);
1878}
1879
1894__STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount)
1895{
1896 MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);
1897}
1898
1907__STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(const USART_TypeDef *USARTx)
1908{
1909 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);
1910}
1911
1922__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
1923{
1924 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue);
1925}
1926
1936__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(const USART_TypeDef *USARTx)
1937{
1938 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
1939}
1940
1951__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
1952{
1953 MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos));
1954}
1955
1965__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx)
1966{
1967 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
1968}
1969
1986__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
1987{
1988 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
1989}
1990
1999__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
2000{
2001 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
2002}
2003
2012__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(const USART_TypeDef *USARTx)
2013{
2014 return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
2015}
2016
2036__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
2037{
2038 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
2039}
2040
2051__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(const USART_TypeDef *USARTx)
2052{
2053 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
2054}
2055
2064__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
2065{
2066 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
2067}
2068
2077__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
2078{
2079 CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
2080}
2081
2090__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx)
2091{
2092 return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL);
2093}
2094
2112__STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
2113{
2115}
2116
2125__STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(const USART_TypeDef *USARTx)
2126{
2127 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
2128}
2129
2139__STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
2140{
2142}
2143
2152__STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(const USART_TypeDef *USARTx)
2153{
2154 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
2155}
2156
2165__STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx)
2166{
2167 SET_BIT(USARTx->CR3, USART_CR3_DEM);
2168}
2169
2178__STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx)
2179{
2180 CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);
2181}
2182
2191__STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(const USART_TypeDef *USARTx)
2192{
2193 return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
2194}
2195
2207__STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
2208{
2209 MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
2210}
2211
2222__STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(const USART_TypeDef *USARTx)
2223{
2224 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));
2225}
2226
2260__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
2261{
2262 /* In Asynchronous mode, the following bits must be kept cleared:
2263 - LINEN, CLKEN bits in the USART_CR2 register,
2264 - SCEN, IREN and HDSEL bits in the USART_CR3 register.
2265 */
2268}
2269
2297__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
2298{
2299 /* In Synchronous mode, the following bits must be kept cleared:
2300 - LINEN bit in the USART_CR2 register,
2301 - SCEN, IREN and HDSEL bits in the USART_CR3 register.
2302 */
2303 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
2305 /* set the UART/USART in Synchronous mode */
2306 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
2307}
2308
2338__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
2339{
2340 /* In LIN mode, the following bits must be kept cleared:
2341 - STOP and CLKEN bits in the USART_CR2 register,
2342 - IREN, SCEN and HDSEL bits in the USART_CR3 register.
2343 */
2346 /* Set the UART/USART in LIN mode */
2347 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
2348}
2349
2377__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
2378{
2379 /* In Half Duplex mode, the following bits must be kept cleared:
2380 - LINEN and CLKEN bits in the USART_CR2 register,
2381 - SCEN and IREN bits in the USART_CR3 register.
2382 */
2385 /* set the UART/USART in Half Duplex mode */
2386 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
2387}
2388
2418__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
2419{
2420 /* In Smartcard mode, the following bits must be kept cleared:
2421 - LINEN bit in the USART_CR2 register,
2422 - IREN and HDSEL bits in the USART_CR3 register.
2423 */
2424 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
2426 /* Configure Stop bits to 1.5 bits */
2427 /* Synchronous mode is activated by default */
2429 /* set the UART/USART in Smartcard mode */
2430 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
2431}
2432
2462__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
2463{
2464 /* In IRDA mode, the following bits must be kept cleared:
2465 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
2466 - SCEN and HDSEL bits in the USART_CR3 register.
2467 */
2470 /* set the UART/USART in IRDA mode */
2471 SET_BIT(USARTx->CR3, USART_CR3_IREN);
2472}
2473
2501__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
2502{
2503 /* In Multi Processor mode, the following bits must be kept cleared:
2504 - LINEN and CLKEN bits in the USART_CR2 register,
2505 - IREN, SCEN and HDSEL bits in the USART_CR3 register.
2506 */
2509}
2510
2525__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx)
2526{
2527 return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
2528}
2529
2536__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx)
2537{
2538 return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
2539}
2540
2547__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx)
2548{
2549 return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
2550}
2551
2558__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx)
2559{
2560 return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
2561}
2562
2569__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx)
2570{
2571 return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
2572}
2573
2580__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(const USART_TypeDef *USARTx)
2581{
2582 return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
2583}
2584
2591__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx)
2592{
2593 return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
2594}
2595
2602__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(const USART_TypeDef *USARTx)
2603{
2604 return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
2605}
2606
2615__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx)
2616{
2617 return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL);
2618}
2619
2628__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx)
2629{
2630 return ((READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
2631}
2632
2641__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(const USART_TypeDef *USARTx)
2642{
2643 return ((READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
2644}
2645
2652__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(const USART_TypeDef *USARTx)
2653{
2654 return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL);
2655}
2656
2665__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(const USART_TypeDef *USARTx)
2666{
2667 return ((READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF)) ? 1UL : 0UL);
2668}
2669
2678__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(const USART_TypeDef *USARTx)
2679{
2680 return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL);
2681}
2682
2691__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(const USART_TypeDef *USARTx)
2692{
2693 return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL);
2694}
2695
2702__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(const USART_TypeDef *USARTx)
2703{
2704 return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
2705}
2706
2713__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx)
2714{
2715 return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
2716}
2717
2724__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(const USART_TypeDef *USARTx)
2725{
2726 return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
2727}
2728
2735__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(const USART_TypeDef *USARTx)
2736{
2737 return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
2738}
2739
2748__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(const USART_TypeDef *USARTx)
2749{
2750 return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
2751}
2752
2759__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx)
2760{
2761 return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
2762}
2763
2770__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(const USART_TypeDef *USARTx)
2771{
2772 return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
2773}
2774
2781__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
2782{
2783 WRITE_REG(USARTx->ICR, USART_ICR_PECF);
2784}
2785
2792__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
2793{
2794 WRITE_REG(USARTx->ICR, USART_ICR_FECF);
2795}
2796
2803__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
2804{
2805 WRITE_REG(USARTx->ICR, USART_ICR_NCF);
2806}
2807
2814__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
2815{
2816 WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
2817}
2818
2825__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
2826{
2827 WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
2828}
2829
2836__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
2837{
2838 WRITE_REG(USARTx->ICR, USART_ICR_TCCF);
2839}
2840
2841
2850__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
2851{
2852 WRITE_REG(USARTx->ICR, USART_ICR_LBDCF);
2853}
2854
2863__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
2864{
2865 WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
2866}
2867
2874__STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx)
2875{
2876 WRITE_REG(USARTx->ICR, USART_ICR_RTOCF);
2877}
2878
2887__STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx)
2888{
2889 WRITE_REG(USARTx->ICR, USART_ICR_EOBCF);
2890}
2891
2898__STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
2899{
2900 WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
2901}
2902
2911__STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx)
2912{
2913 WRITE_REG(USARTx->ICR, USART_ICR_WUCF);
2914}
2915
2930__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
2931{
2933}
2934
2941__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
2942{
2944}
2945
2952__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
2953{
2955}
2956
2963__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
2964{
2966}
2967
2974__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
2975{
2977}
2978
2985__STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx)
2986{
2988}
2989
2996__STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx)
2997{
2999}
3000
3009__STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
3010{
3012}
3013
3022__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
3023{
3024 SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
3025}
3026
3037__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
3038{
3040}
3041
3050__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
3051{
3053}
3054
3063__STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx)
3064{
3066}
3067
3068
3075__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
3076{
3078}
3079
3086__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
3087{
3089}
3090
3097__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
3098{
3100}
3101
3108__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
3109{
3111}
3112
3119__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
3120{
3122}
3123
3130__STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
3131{
3133}
3134
3141__STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx)
3142{
3144}
3145
3154__STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx)
3155{
3157}
3158
3167__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
3168{
3169 CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
3170}
3171
3182__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
3183{
3185}
3186
3195__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
3196{
3198}
3199
3208__STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx)
3209{
3211}
3212
3213
3220__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(const USART_TypeDef *USARTx)
3221{
3222 return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
3223}
3224
3231__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(const USART_TypeDef *USARTx)
3232{
3233 return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U);
3234}
3235
3242__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx)
3243{
3244 return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
3245}
3246
3253__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(const USART_TypeDef *USARTx)
3254{
3255 return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1U : 0U);
3256}
3257
3264__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx)
3265{
3266 return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
3267}
3268
3275__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(const USART_TypeDef *USARTx)
3276{
3277 return ((READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
3278}
3279
3286__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(const USART_TypeDef *USARTx)
3287{
3288 return ((READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE)) ? 1UL : 0UL);
3289}
3290
3299__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(const USART_TypeDef *USARTx)
3300{
3301 return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL);
3302}
3303
3312__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx)
3313{
3314 return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL);
3315}
3316
3323__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx)
3324{
3325 return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
3326}
3327
3336__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx)
3337{
3338 return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
3339}
3340
3349__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(const USART_TypeDef *USARTx)
3350{
3351 return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
3352}
3353
3354
3369__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
3370{
3372}
3373
3380__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
3381{
3383}
3384
3391__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(const USART_TypeDef *USARTx)
3392{
3393 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
3394}
3395
3402__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
3403{
3405}
3406
3413__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
3414{
3416}
3417
3424__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(const USART_TypeDef *USARTx)
3425{
3426 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
3427}
3428
3435__STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
3436{
3437 SET_BIT(USARTx->CR3, USART_CR3_DDRE);
3438}
3439
3446__STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
3447{
3448 CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);
3449}
3450
3457__STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(const USART_TypeDef *USARTx)
3458{
3459 return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
3460}
3461
3472__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx, uint32_t Direction)
3473{
3474 uint32_t data_reg_addr;
3475
3476 if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
3477 {
3478 /* return address of TDR register */
3479 data_reg_addr = (uint32_t) &(USARTx->TDR);
3480 }
3481 else
3482 {
3483 /* return address of RDR register */
3484 data_reg_addr = (uint32_t) &(USARTx->RDR);
3485 }
3486
3487 return data_reg_addr;
3488}
3489
3504__STATIC_INLINE uint8_t LL_USART_ReceiveData8(const USART_TypeDef *USARTx)
3505{
3506 return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU);
3507}
3508
3515__STATIC_INLINE uint16_t LL_USART_ReceiveData9(const USART_TypeDef *USARTx)
3516{
3517 return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
3518}
3519
3527__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
3528{
3529 USARTx->TDR = Value;
3530}
3531
3539__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
3540{
3541 USARTx->TDR = (uint16_t)(Value & 0x1FFUL);
3542}
3543
3560__STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
3561{
3562 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_ABRRQ);
3563}
3564
3571__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
3572{
3573 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
3574}
3575
3582__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
3583{
3584 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_MMRQ);
3585}
3586
3595__STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
3596{
3597 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
3598}
3599
3608__STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx)
3609{
3610 SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_TXFRQ);
3611}
3612
3617#if defined(USE_FULL_LL_DRIVER)
3621ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx);
3622ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct);
3623void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
3624ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
3625void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
3629#endif /* USE_FULL_LL_DRIVER */
3630
3639#endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
3640
3645#ifdef __cplusplus
3646}
3647#endif
3648
3649#endif /* STM32F3xx_LL_USART_H */
3650
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
#define ATOMIC_CLEAR_BIT(REG, BIT)
Definition: stm32f3xx.h:217
#define CLEAR_BIT(REG, BIT)
Definition: stm32f3xx.h:192
#define SET_BIT(REG, BIT)
Definition: stm32f3xx.h:190
#define WRITE_REG(REG, VAL)
Definition: stm32f3xx.h:198
#define ATOMIC_SET_BIT(REG, BIT)
Definition: stm32f3xx.h:208
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f3xx.h:202
#define READ_BIT(REG, BIT)
Definition: stm32f3xx.h:194
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)
Definition: stm32f3xx.h:226
ErrorStatus
Definition: stm32f3xx.h:177
#define USART_ICR_WUCF
Definition: stm32f303xe.h:14462
#define USART_ISR_NE
Definition: stm32f303xe.h:14367
#define USART_ISR_RTOF
Definition: stm32f303xe.h:14394
#define USART_ISR_RWU
Definition: stm32f303xe.h:14415
#define USART_RTOR_BLEN
Definition: stm32f303xe.h:14339
#define USART_CR1_UESM
Definition: stm32f303xe.h:14120
#define USART_CR3_DEP
Definition: stm32f303xe.h:14300
#define USART_GTPR_GT_Pos
Definition: stm32f303xe.h:14328
#define USART_CR3_IRLP
Definition: stm32f303xe.h:14261
#define USART_CR1_PEIE
Definition: stm32f303xe.h:14141
#define USART_ISR_FE
Definition: stm32f303xe.h:14364
#define USART_RQR_MMRQ
Definition: stm32f303xe.h:14350
#define USART_CR2_STOP_1
Definition: stm32f303xe.h:14218
#define USART_CR1_UE
Definition: stm32f303xe.h:14117
#define USART_CR2_ADD_Pos
Definition: stm32f303xe.h:14248
#define USART_RQR_SBKRQ
Definition: stm32f303xe.h:14347
#define USART_CR2_ADDM7
Definition: stm32f303xe.h:14195
#define USART_CR1_PS
Definition: stm32f303xe.h:14144
#define USART_CR3_IREN
Definition: stm32f303xe.h:14258
#define USART_ISR_EOBF
Definition: stm32f303xe.h:14397
#define USART_CR3_OVRDIS
Definition: stm32f303xe.h:14291
#define USART_CR2_CPHA
Definition: stm32f303xe.h:14207
#define USART_ICR_ORECF
Definition: stm32f303xe.h:14438
#define USART_ISR_RXNE
Definition: stm32f303xe.h:14376
#define USART_ICR_RTOCF
Definition: stm32f303xe.h:14453
#define USART_CR2_ADD
Definition: stm32f303xe.h:14250
#define USART_CR3_NACK
Definition: stm32f303xe.h:14267
#define USART_CR3_SCARCNT_Pos
Definition: stm32f303xe.h:14301
#define USART_ICR_PECF
Definition: stm32f303xe.h:14429
#define USART_CR2_CLKEN
Definition: stm32f303xe.h:14213
#define USART_ICR_EOBCF
Definition: stm32f303xe.h:14456
#define USART_CR2_LBCL
Definition: stm32f303xe.h:14204
#define USART_CR1_MME
Definition: stm32f303xe.h:14156
#define USART_CR2_SWAP
Definition: stm32f303xe.h:14224
#define USART_CR1_IDLEIE
Definition: stm32f303xe.h:14129
#define USART_ICR_CMCF
Definition: stm32f303xe.h:14459
#define USART_CR3_DMAT
Definition: stm32f303xe.h:14276
#define USART_RTOR_RTO
Definition: stm32f303xe.h:14336
#define USART_CR1_PCE
Definition: stm32f303xe.h:14147
#define USART_CR3_CTSIE
Definition: stm32f303xe.h:14285
#define USART_CR1_DEAT
Definition: stm32f303xe.h:14173
#define USART_CR1_TXEIE
Definition: stm32f303xe.h:14138
#define USART_CR2_MSBFIRST
Definition: stm32f303xe.h:14236
#define USART_ISR_SBKF
Definition: stm32f303xe.h:14412
#define USART_CR1_DEAT_Pos
Definition: stm32f303xe.h:14171
#define USART_CR3_WUS
Definition: stm32f303xe.h:14309
#define USART_CR2_ABRMODE
Definition: stm32f303xe.h:14242
#define USART_RQR_RXFRQ
Definition: stm32f303xe.h:14353
#define USART_CR3_RTSE
Definition: stm32f303xe.h:14279
#define USART_CR2_LBDL
Definition: stm32f303xe.h:14198
#define USART_CR3_WUFIE
Definition: stm32f303xe.h:14314
#define USART_ISR_CMF
Definition: stm32f303xe.h:14409
#define USART_ICR_FECF
Definition: stm32f303xe.h:14432
#define USART_ISR_CTS
Definition: stm32f303xe.h:14391
#define USART_ICR_CTSCF
Definition: stm32f303xe.h:14450
#define USART_GTPR_GT
Definition: stm32f303xe.h:14330
#define USART_CR2_DATAINV
Definition: stm32f303xe.h:14233
#define USART_CR1_RXNEIE
Definition: stm32f303xe.h:14132
#define USART_CR3_SCEN
Definition: stm32f303xe.h:14270
#define USART_CR1_M
Definition: stm32f303xe.h:14190
#define USART_CR3_ONEBIT
Definition: stm32f303xe.h:14288
#define USART_ICR_IDLECF
Definition: stm32f303xe.h:14441
#define USART_ISR_ORE
Definition: stm32f303xe.h:14370
#define USART_ISR_CTSIF
Definition: stm32f303xe.h:14388
#define USART_CR2_LBDIE
Definition: stm32f303xe.h:14201
#define USART_GTPR_PSC
Definition: stm32f303xe.h:14327
#define USART_ISR_PE
Definition: stm32f303xe.h:14361
#define USART_CR3_CTSE
Definition: stm32f303xe.h:14282
#define USART_CR1_TCIE
Definition: stm32f303xe.h:14135
#define USART_RQR_TXFRQ
Definition: stm32f303xe.h:14356
#define USART_ISR_TC
Definition: stm32f303xe.h:14379
#define USART_ISR_REACK
Definition: stm32f303xe.h:14424
#define USART_CR2_ABREN
Definition: stm32f303xe.h:14239
#define USART_CR1_CMIE
Definition: stm32f303xe.h:14159
#define USART_ICR_LBDCF
Definition: stm32f303xe.h:14447
#define USART_CR3_EIE
Definition: stm32f303xe.h:14255
#define USART_CR1_DEDT
Definition: stm32f303xe.h:14165
#define USART_ISR_TXE
Definition: stm32f303xe.h:14382
#define USART_CR2_RTOEN
Definition: stm32f303xe.h:14247
#define USART_CR1_RTOIE
Definition: stm32f303xe.h:14181
#define USART_CR3_SCARCNT
Definition: stm32f303xe.h:14303
#define USART_CR3_HDSEL
Definition: stm32f303xe.h:14264
#define USART_CR2_LINEN
Definition: stm32f303xe.h:14221
#define USART_CR3_DEM
Definition: stm32f303xe.h:14297
#define USART_ISR_IDLE
Definition: stm32f303xe.h:14373
#define USART_ICR_TCCF
Definition: stm32f303xe.h:14444
#define USART_RQR_ABRRQ
Definition: stm32f303xe.h:14344
#define USART_ICR_NCF
Definition: stm32f303xe.h:14435
#define USART_CR1_WAKE
Definition: stm32f303xe.h:14150
#define USART_ISR_WUF
Definition: stm32f303xe.h:14418
#define USART_CR1_RE
Definition: stm32f303xe.h:14123
#define USART_RTOR_BLEN_Pos
Definition: stm32f303xe.h:14337
#define USART_CR2_TXINV
Definition: stm32f303xe.h:14230
#define USART_CR1_TE
Definition: stm32f303xe.h:14126
#define USART_CR1_DEDT_Pos
Definition: stm32f303xe.h:14163
#define USART_CR3_DDRE
Definition: stm32f303xe.h:14294
#define USART_CR1_EOBIE
Definition: stm32f303xe.h:14184
#define USART_ISR_ABRE
Definition: stm32f303xe.h:14400
#define USART_RDR_RDR
Definition: stm32f303xe.h:14467
#define USART_CR1_OVER8
Definition: stm32f303xe.h:14162
#define USART_CR2_STOP_0
Definition: stm32f303xe.h:14217
#define USART_ISR_LBDF
Definition: stm32f303xe.h:14385
#define USART_ISR_TEACK
Definition: stm32f303xe.h:14421
#define USART_CR2_STOP
Definition: stm32f303xe.h:14216
#define USART_ISR_BUSY
Definition: stm32f303xe.h:14406
#define USART_CR2_CPOL
Definition: stm32f303xe.h:14210
#define USART_ISR_ABRF
Definition: stm32f303xe.h:14403
#define USART_CR3_DMAR
Definition: stm32f303xe.h:14273
#define USART_CR2_RXINV
Definition: stm32f303xe.h:14227
CMSIS STM32F3xx Device Peripheral Access Layer Header File.
Universal Synchronous Asynchronous Receiver Transmitter.
Definition: stm32f303xe.h:704
__IO uint16_t TDR
Definition: stm32f303xe.h:716
__IO uint32_t RTOR
Definition: stm32f303xe.h:710
__IO uint32_t CR1
Definition: stm32f303xe.h:705
__IO uint32_t BRR
Definition: stm32f303xe.h:708
__IO uint32_t ISR
Definition: stm32f303xe.h:712
__IO uint32_t CR2
Definition: stm32f303xe.h:706
__IO uint16_t RDR
Definition: stm32f303xe.h:714
__IO uint32_t ICR
Definition: stm32f303xe.h:713
__IO uint32_t RQR
Definition: stm32f303xe.h:711
__IO uint32_t GTPR
Definition: stm32f303xe.h:709
__IO uint32_t CR3
Definition: stm32f303xe.h:707